Sr. Emulation Engineer

VeriFast Technologies; San Francisco (CA); On-site; USD 100,000 - 250,000; Full time

Job summary

VeriFast Technologies is seeking talented Emulation Engineers at various experience levels to support advanced ASIC and SoC development projects using Synopsys ZeBu emulation platforms.

Selected engineers will work on complex semiconductor designs, supporting pre-silicon verification, SoC bring-up, hardware/software co-verification, debugging, and emulation performance optimization.

Qualifications

• 4+ to 20+ years of experience in ASIC/SoC Design Verification, emulation, or pre-silicon validation.
• Strong understanding of digital design, SoC architecture, and RTL verification methodologies.
• Proficiency in Verilog and/or SystemVerilog.
• Experience with emulation platforms such as ZeBu, Palladium, or Veloce.
• Familiarity with RTL compilation, emulation bring-up, debugging, and verification execution.
• Understanding of UVM-based verification environments.
• Experience with Linux environments and scripting using Python, Tcl, Perl, or Shell.
• Bachelor's or Master's degree in Electrical/Computer Engineering or related field, or equivalent experience.

Responsibilities

• Develop, configure, deploy, and maintain emulation environments using ZeBu.
• Perform RTL compilation, model generation, partitioning, and emulation bring-up.
• Debug complex SoC, subsystem, and IP-level issues.
• Migrate simulation-based verification to emulation workflows.
• Develop and support emulation testbenches, transactors, and BFMs.
• Execute system-level verification, firmware boot sequences, and co-validation.
• Identify and resolve emulation performance bottlenecks and runtime issues.
• Automate build, regression, and debugging workflows.
• Collaborate with RTL design, verification, architecture, firmware, and software teams.
• Document methodologies and results.

Skills

RTL verification

SoC architecture

Verilog/SystemVerilog

Linux scripting

problem solving

Education

Bachelor's or Master's in EE/CE/CS

Tools

Synopsys ZeBu

Cadence Palladium

Siemens Veloce

VCS

Verdi

Job description

VeriFast Technologies is seeking talented Emulation Engineers at various experience levels to support advanced ASIC and SoC development projects using Synopsys ZeBu emulation platforms.

Selected engineers will work on complex semiconductor designs, supporting pre-silicon verification, SoC bring-up, hardware/software co-verification, debugging, and emulation performance optimization.

We welcome candidates ranging from experienced individual contributors to senior technical leaders capable of owning complete emulation environments.

Key Responsibilities

• Develop, configure, deploy, and maintain ASIC/SoC emulation environments using Synopsys ZeBu.
• Perform RTL compilation, model generation, partitioning, emulation bring-up, and execution.
• Debug complex SoC, subsystem, and IP-level hardware and software issues.
• Migrate and adapt simulation-based verification environments for emulation.
• Develop and support emulation testbenches, transactors, BFMs, and simulation acceleration environments.
• Execute system-level verification, firmware boot sequences, and hardware/software co-validation.
• Identify and resolve emulation performance bottlenecks, compilation failures, and runtime issues.
• Automate build, regression, and debugging workflows.
• Collaborate with RTL design, Design Verification, architecture, firmware, and software engineering teams.
• Document methodologies, debug results, and technical solutions.

Required Qualifications

• Multiple openings: Experience ranging from 4 years to 20+ years of relevant experience in ASIC/SoC Design Verification, emulation, or pre-silicon validation.
• Strong understanding of digital design, SoC architecture, and RTL verification methodologies.
• Proficiency in Verilog and/or SystemVerilog.
• Experience with hardware emulation platforms such as Synopsys ZeBu, Cadence Palladium, or Siemens Veloce.
• Familiarity with RTL compilation, emulation bring-up, debugging, and verification execution.
• Understanding of UVM-based verification environments.
• Experience with Linux environments and scripting using Python, Tcl, Perl, or Shell.
• Strong analytical, debugging, and problem-solving capabilities.
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

Preferred Qualifications

• Direct hands-on experience with Synopsys ZeBu platforms.
• Experience with Synopsys VCS and Verdi.
• Familiarity with SCE-MI, transactors, simulation acceleration, or hybrid emulation.
• Experience with C/C++ and embedded software validation.
• Knowledge of protocols such as PCIe, Ethernet, AXI, AHB, APB, DDR, USB, or CXL.
• Experience with full-chip SoC verification, processor boot flows, or firmware bring-up.
• Experience optimizing complex emulation environments for performance and capacity.
• Prior technical leadership or mentoring experience.

Compensation

$100K - $250K per year, depending on experience. We are seeking multiple engineers with varying experience from 4 years - 20+ years experience.