Edge AI Hardware PM: NPU & Chiplet Roadmaps

NXP Semiconductors NV; Austin (TX); Sur place; USD 180 000 - 260 000; Plein temps

Résumé du poste

NXP Semiconductors is seeking a Senior Product Manager for NPU hardware platforms in Austin, TX. You will own multi-generational hardware roadmaps across NPUs, i.MX IP, and chiplet-scale architectures, translating customer needs into silicon specs and business cases.

You will partner with architecture, engineering, and executive teams to drive design decisions, manage lifecycle from definition to EOL, and present strategies to leadership.

Qualifications

• 10+ years in semiconductor product management with hardware ownership.
• Defined silicon product specs — performance targets, memory, power, packaging.
• Experience with SoC/IP integration and host processor interfacing.
• Familiarity with chiplet architectures and UCIe interconnect.
• Proven track record in design wins and multi-generation products.
• Build and defend business cases including BOM cost, ASP, gross margin, and market sizing.

Responsabilités

• Define and maintain the multi-generational hardware roadmap across NPUs, i.MX-integrated NPU IP, and chiplet-based scale-out architectures.
• Translate customer requirements and competitive intelligence into silicon product specifications including performance targets (TOPS, TOPS/W, TOPS/sq.mm), memory architecture, power, I/O, packaging, safety and process node decisions.
• Drive product definition through architecture review, design partitioning, and feature tradeoff decisions in close collaboration with silicon architects and engineering leads.
• Own the business case for each hardware product — BOM cost, ASP, gross margin targets, volume projections, and NPV — and present investment recommendations to executive leadership.
• Lead make-vs-buy-vs-IP-license assessments for new capabilities including MAC array architectures like in-memory compute, non-uniform memory subsystems, memory architectures and interconnect IP like UCIe.
• Define chiplet strategy for scale-out NPU configurations — including die partitioning, die-to-die interface selection, and multi-chip package requirements to support larger model inference workloads.
• Partner with the i.MX, S32 SoC, i.MCU, and RT product teams to define NPU IP integration requirements, including power domains, bus interfaces, memory bandwidth allocation, software-hardware co-design constraints, SoC bring-up, and debugging.
• Drive early access and customer sampling programs; gather validated product requirements from lead customers and feed them into architecture decisions before freeze.
• Own the competitive benchmarking framework — track competing NPU silicon from Qualcomm, Nvidia, RockChip, Hailo, Axelera, Ambarella, and others; define differentiation strategy on formfactors, performance, power, cost, safety, support and software ecosystem.
• Manage product lifecycle from definition through ramp, sustaining, and EOL — including customer transition plans across generations.
• Represent the NPU hardware portfolio to NXP executive leadership, customers, partners, and at industry events.
• Co‑own SW development of dNPU, integrated and chiplet based designs w/ the SW product manager.
• Develop end‑to‑end system solutions and demonstration platforms for hardware and software developers at industry events and conferences.

Connaissances

Product management

Silicon IP

SoC integration

Competitive analysis

Cross-functional leadership

Executive communication

Formation

MBA or advanced degree in Electrical/Computer Engineering

Description du poste

NXP Semiconductors is seeking a Senior Product Manager for NPU hardware platforms in Austin, TX. You will own multi-generational hardware roadmaps across NPUs, i.MX IP, and chiplet-scale architectures, translating customer needs into silicon specs and business cases.

You will partner with architecture, engineering, and executive teams to drive design decisions, manage lifecycle from definition to EOL, and present strategies to leadership.