DRAM Process Integration Engineer — R&D for Next-Gen Memory

Micron Technology, Inc.; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid time off

Paid holidays

401(k) retirement plan

Job summary

Micron Technology, Inc. is seeking a Process Integration Engineer for the DRAM R&D Memory Group. You will develop and integrate critical technology enabling future DRAM memory scaling, working with multiple teams to translate new module solutions into production.

Requirements include an MS or PhD in a relevant field, expertise in device physics and memory tech, and strong data analysis, DOE and statistics capabilities. The role emphasizes cross-functional collaboration and engineering leadership.

Qualifications

• MS degree or higher in Electrical Engineering, Physics, or related field.
• Expertise in device physics and memory technologies.
• Understanding of Process Integration.
• Proficiency with data analysis, DOE, and statistics.

Responsibilities

• Engineer and develop novel process flows for critical modules.
• Improve performance and reduce cost of future memory chips.
• Design experiments and analyze results using DOE.
• Collaborate with Design, Process Development, Modeling, Yield, Electrical and Physical Failure Analysis, Parmetric, and Quality teams to identify and resolve issues.
• Summarize complex problems, develop actions to address them, and drive cross-team solutions.
• Define and achieve sub-milestones for projects within the program timelines.

Skills

Data analysis

DOE

Statistical techniques

Device physics

Process integration

Problem solving

Education

MS in Electrical Engineering or related field

PhD in Electrical Engineering or Physics

Job description

Micron Technology, Inc. is seeking a Process Integration Engineer for the DRAM R&D Memory Group. You will develop and integrate critical technology enabling future DRAM memory scaling, working with multiple teams to translate new module solutions into production.

Requirements include an MS or PhD in a relevant field, expertise in device physics and memory tech, and strong data analysis, DOE and statistics capabilities. The role emphasizes cross-functional collaboration and engineering leadership.