DRAM DFT & Test Flow Engineer | Innovate & Optimize

Micron Technology; Boise (ID); On-site; USD 80,000 - 110,000; Full time

Benefits offered by this job

Medical plans

Dental plans

Vision plans

Paid time off

Paid holidays

Wellbeing programs

Job summary

Micron Technology is seeking an engineer to develop DRAM DFT strategies and test flow enhancements at our Boise campus. The role focuses on fail pattern recognition, analytics, and building supporting software tools for engineering analysis.

Candidates should hold a Bachelor's degree in EE/CS/ECE or related field, with CMOS circuit knowledge and basic lab or profiling experience. A mix of Python/Java/C/C++ skills and DRAM knowledge is expected.

Qualifications

• Bachelor's degree required in Electrical Engineering, Computer Science, Electrical and Computer Engineering or related field.
• CMOS circuit knowledge required.
• Basic lab experience or equivalent applied software profiling/analytics.
• Basic programming skills in Python, Java, C or C++.
• DRAM knowledge.
• Statistics.

Responsibilities

• Team oriented approach to create new strategies for DRAM DFT.
• New DRAM Test Flow Strategy.
• Fail Pattern Recognition.
• Create supporting software tools to assist in Engineering Analysis.
• Invent and Innovate anything and everything related to DFT.

Job description

Micron Technology is seeking an engineer to develop DRAM DFT strategies and test flow enhancements at our Boise campus. The role focuses on fail pattern recognition, analytics, and building supporting software tools for engineering analysis.

Candidates should hold a Bachelor's degree in EE/CS/ECE or related field, with CMOS circuit knowledge and basic lab or profiling experience. A mix of Python/Java/C/C++ skills and DRAM knowledge is expected.