Senior Memory Interface SI Engineer (DDR/LPDDR)

Apple, Inc.; Austin (TX); On-site; USD 170,000 - 210,000; Full time

Job summary

Apple, Inc. in Austin, TX is seeking a senior Signal Integrity Engineer for memory interfaces on Apple SoCs. You will own SI for the memory subsystem from package to board, validate DDR/LPDDR interfaces, and collaborate with silicon, design, and test teams to optimize yield and timing.

The role requires hands-on modeling, electrical extraction, and lab validation using VNA, TDR, scope, and other lab tools. Strong Python skills and experience with script-based automation are highly valued.

Qualifications

• BS + 10 years of industry experience.
• MSEE + 8 years of industry experience and/or Ph.D. preferred.
• Familiar with signal and power integrity issues of memory interfaces.
• Experience with product package/board design and PI/SI methodology development.
• Lab correlation/validation of simulation results is a plus.
• Strong academic background.
• Familiar with lab equipment: VNA, TDR, oscilloscope, spectrum analyzer.
• Solid knowledge of 3D/2D EM simulations and transmission line theory.
• Proficient in Python and able to leverage AI coding assistants.

Responsibilities

• Conduct end-to-end SI/PI simulations for memory system including channels and power delivery networks to meet tight timing and voltage specs.
• Provide feedback and guidelines to silicon floorplan, package, system design.
• Set optimal IO settings and design guidelines for cross-functional teams.
• Perform feasibility studies for next-generation signaling schemes.
• Correlate simulations with silicon measurements.

Skills

Memory interface SI/PI

Python

DDR/LPDDR knowledge

Generative AI coding

Lab equipment familiarity

EM simulation fundamentals

Education

Bachelor's degree in Electrical Engineering

Master of Science in Electrical Engineering (MSEE)

PhD (preferred)

Tools

VNA

TDR

Oscilloscope

Spectrum analyzer

3D/2D EM simulation tools

Job description

Apple, Inc. in Austin, TX is seeking a senior Signal Integrity Engineer for memory interfaces on Apple SoCs. You will own SI for the memory subsystem from package to board, validate DDR/LPDDR interfaces, and collaborate with silicon, design, and test teams to optimize yield and timing.

The role requires hands-on modeling, electrical extraction, and lab validation using VNA, TDR, scope, and other lab tools. Strong Python skills and experience with script-based automation are highly valued.