Director, SerDes IP Systems Engineering (D2D & Modeling)

Cadence

San Jose (CA)

On-site

USD 179,000 - 332,000

Full time

3 days ago
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Benefits offered by this job

Incentive compensation
Equity options
Benefits package

Job summary

Cadence seeks a Systems Engineering Director for SerDes IP to lead the Die-to-Die Interface IP team within the Silicon Solutions R&D Group. You will drive analysis and modeling of high-performance SerDes, oversee end-to-end simulations, and guide design-in guidelines for customers.

The role demands leadership and hands-on technical development, with responsibilities spanning modeling, specs generation, and cross-team collaboration to deliver robust DI-IP products.

Qualifications

  • 10+ years of experience with high-speed SerDes and PHYs.
  • Deep understanding of high-speed SerDes architecture.
  • PhD or MS in Electrical/Computer Engineering (or similar).
  • Strong group presentation and leadership skills.

Responsibilities

  • Develop statistical and linear systems analysis of the link and define design specs for circuit designers.
  • Drive R&D team to model and analyze high-performance D2D SerDes IP architecture and link budget.
  • Create infrastructure for robust product development, systems modeling, and testing.
  • Lead end-to-end link simulations using MATLAB/Simulink/ADS and other simulators.
  • Provide guidelines on signal integrity and power integrity to customers.
  • Support customer package/board design and debugging as needed.
  • Guide packaging team based on in-package D2D link channel analysis.
  • Generate technical specs, data sheets, and application notes.

Skills

High speed SerDes
Systems analysis
MATLAB
Simulink
Data analysis
Leadership
Scripting (Python/Perl)
Signal processing

Education

PhD or MS in Electrical/Computer Engineering

Tools

MATLAB
Simulink
ADS
Perl

Job description

Cadence seeks a Systems Engineering Director for SerDes IP to lead the Die-to-Die Interface IP team within the Silicon Solutions R&D Group. You will drive analysis and modeling of high-performance SerDes, oversee end-to-end simulations, and guide design-in guidelines for customers.

The role demands leadership and hands-on technical development, with responsibilities spanning modeling, specs generation, and cross-team collaboration to deliver robust DI-IP products.

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