Digital IC Design Engineer-Physical Design (Early career)

SRI International; Princeton (NJ); On-site; USD 70,000 - 106,000; Full time

Job summary

A leading company in advanced imaging technologies seeks a Digital IC Design Engineer to work on state-of-the-art designs for various applications, including low light and space imaging. The ideal candidate will bring expertise in physical design tools and a collaborative mindset to contribute to innovative projects.

Qualifications

• 1-5 years of experience with physical design tools.
• Due to government contract requirements, must be a US citizen.
• Experience with Cadence Innovus desirable.

Responsibilities

• Physical design and layout of digital logic designs from netlist to GDS.
• Translate logical designs into physical layouts ensuring performance and power requirements.
• Collaboration with RTL design engineers and other team members.

Skills

Timing analysis

Problem-solving skills

Analytical skills

Collaboration skills

Education

Bachelors in Electrical Engineering

Masters degree preferred

Tools

Cadence

Synopsys

TCL

Python

Job description

Digital IC Design Engineer-Physical Design (Early career)

Job Locations

US-NJ-Princeton

ID

2025-6183

Category

Engineering

Position Type

Full-Time

Worker Type

Hybrid

Overview

For more than 60 years, SRI has innovated, developed, and delivered next-generation imaging capabilities and systems for commercial, defense, space, and scientific applications. Today, the Center for Advanced Imaging is pioneering next-generation technologies that are changing the way we see and understand our world across the electro-optical spectrum. From design to fabrication, we develop and deploy complex imagers for space, scientific imaging, commercial applications, spectroscopy and more.

The Center for Advanced Imaging Electrical Engineering Team is seeking an innovative and highly motivated individual to join us in the development of state-of-the-art IC designs for numerous commercial, spacecraft, and government applications. The ideal candidate would join a multidisciplinary group dedicated to the development of complex electronics for applications such as low light imaging cameras, space base imaging cameras, LiDAR cameras, including ROIC and Imagers for those applications.

The position will work a hybrid schedule, 3-4 days a week in our Princeton, NJ office and 1-2 days working remotely.

Responsibilities

Physical design and layout (Place & Route) of digital logic designs from netlist to GDS.

• Translate logical designs into physical layouts, ensuring integrated circuits (ICs) meet performance, power, and area requirements through tasks like floor planning, placement, complex clock tree construction, routing, and timing closure.
• Design and optimize the power delivery network to ensure sufficient power is supplied to the place and route blocks.
• Perform design rule checks (DRC) and layout versus schematic (LVS) verification to ensure the physical layout meets design rules and matches the schematic.
• Optimize the physical layout to improve performance, reduce power consumption, and minimize area as needed.
• Collaboration with RTL design engineers, Analog IC designers, HW PCB designers, Software developers, and Mechanical team members to produce high quality designs. This includes working with the entire design team to meet design specifications and requirements.
• Design and development of scripts as needed to accomplish the work efficiently for each design.
• Accurately and concisely document and present place and route results to clients, colleagues, designers, and managers.

Qualifications

• Bachelors in Electrical Engineering/Computer Engineering or a related field, Masters degree preferred
• Due to government contract requirements candidates must be a US Citizen
• 1-5 years of experience with physical design tools (e.g., Cadence, Synopsys), design flow, and IC design methodologies
• Experience with Cadence Innovus.
• Understanding of physical design, including timing analysis and timing closure, as well as good floor planning techniques and automation using scripted flows.
• Proficiency in some scripting language - TCL, Perl, Python, etc.
• Knowledge of Microsoft Office products including Visio
• Strong analytical and problem-solving skills
• Excellent communication and collaboration skills

Desired qualifications:

• Knowledge of logic synthesis and timing analysis - Candence Genus or similar
• Knowledge of DRC/LVS - Siemens Caibre, Cadence PVS
• Knowledge of STA - Cadence Tempus
• Knowledge of IR Drop and EM tools - Cadence Voltus
• Knowledge of low power design techniques.
• Experience using Linux and Shell scripting
• Experience with CM tools like Omnify (PLM) and SVN (Rev Control) or similar
• Modest travel, less than 5%

The salary range is: $70,398-$105,381. Salary ranges will vary and are based on several factors, including geographic location, market competitiveness and equity amongst internal employees in similar roles. Positions may also qualify for SRI's Pay for Outstanding Performance program or the annual Performance Based Compensation program. SRI also has a competitive benefits package, to view details please go to https://www.sri.com/resources/benefits/. SRI will accept applications until the position is filled.

SRI is an independent nonprofit research institute headquartered in Menlo Park, Calif., with a rich history of supporting government and industry. We create and deliver world-changing solutions for a safer, healthier, and more sustainable future. For more than 75 years, we have collaborated across technical and scientific disciplines to discover and develop groundbreaking products and technologies and bring innovations and ideas to the marketplace.