Digital ASIC Verification Engineer — Space-Grade Innovation

InvestedintheMission; Irvine (CA); On-site; USD 125,000 - 195,000; Full time

Benefits offered by this job

Stock options

Medical, vision, dental coverage

401(k) retirement plan

Paid parental leave

Paid vacation

Holidays

Sick leave

Job summary

SpaceX in California seeks a Design Verification Engineer (Silicon Engineering) to join cross‑disciplinary teams and develop next‑gen ASICs for space and ground systems.

You will write test plans, build SystemVerilog testbenches (UVM and non‑UVM), run regressions, and collaborate on pre‑/post‑silicon validation. Strong Python/MATLAB automation and verification methodology experience is expected.

Qualifications

• Bachelor's degree in electrical engineering, computer science or computer engineering.
• 1+ years of design verification and test bench development.
• Preferred advanced degree in electrical/computer engineering.
• Experience with UVM verification and Python/MATLAB automation.

Responsibilities

• Verify digital ASIC at block and system level.
• Write/test plans; develop test harnesses and sequences.
• Develop SystemVerilog testbenches (UVM and non-UVM) for DSP blocks.
• Execute test plans, regressions and coverage closure.
• Contribute to pre-silicon and post-silicon validation.
• Hands-on self-starter to fully verify complex designs.

Skills

Testbench development

SystemVerilog

UVM knowledge

Python automation

MATLAB scripting

Problem solving

Object oriented programming

Constrained random verification

Verification methodologies

Education

Bachelor's in E.E./CS/CE

Advanced degree preferred

Tools

Python

MATLAB

UVM

Job description

SpaceX in California seeks a Design Verification Engineer (Silicon Engineering) to join cross‑disciplinary teams and develop next‑gen ASICs for space and ground systems.

You will write test plans, build SystemVerilog testbenches (UVM and non‑UVM), run regressions, and collaborate on pre‑/post‑silicon validation. Strong Python/MATLAB automation and verification methodology experience is expected.