Space-Grade ASIC Verification Engineer

United States Digital Space LLC

Palo Alto (CA)

On-site

USD 135,000 - 210,000

Full time

14 days+

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Benefits offered by this job

Medical, Vision, Dental
401(k)
Life Insurance
Disability Insurance
Paid Parental Leave
3 weeks vacation + holidays

Job summary

United States Digital Space LLC is hiring a Design Verification Engineer (Silicon Engineering) to develop and verify next‑generation ASICs for space and ground infrastructures. You will join cross‑functional teams to design, test, and validate complex digital designs used in Starlink deployment.

The role emphasizes SystemVerilog, UVM, testbench development, and automation with Python and MATLAB, with on‑site work in Palo Alto under ITAR guidelines.

Qualifications

  • Bachelor’s degree in electrical engineering, computer science or computer engineering.
  • 1+ years of experience with design verification and test bench development.
  • Familiar with verification methodologies such as UVM.

Responsibilities

  • Write and review test plans, develop test harnesses and test sequences.
  • Develop SystemVerilog testbench infrastructure (UVM and non‑UVM) for testing designs.
  • Run regressions and ensure code and functional coverage closure.
  • Automate test case generation using Python and MATLAB.
  • Contribute to pre‑silicon verification, chip bring‑up and post‑silicon validation.
  • Be a hands‑on self‑starter to verify complex digital designs.

Skills

SystemVerilog
UVM
Python
MATLAB
C/C++

Education

Bachelor's in EE/CS/CE
MS in EE/CE (preferred)

Tools

Testbench infrastructure

Job description

United States Digital Space LLC is hiring a Design Verification Engineer (Silicon Engineering) to develop and verify next‑generation ASICs for space and ground infrastructures. You will join cross‑functional teams to design, test, and validate complex digital designs used in Starlink deployment.

The role emphasizes SystemVerilog, UVM, testbench development, and automation with Python and MATLAB, with on‑site work in Palo Alto under ITAR guidelines.

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