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United States Digital Space LLC is hiring a Design Verification Engineer (Silicon Engineering) to develop and verify next‑generation ASICs for space and ground infrastructures. You will join cross‑functional teams to design, test, and validate complex digital designs used in Starlink deployment.
The role emphasizes SystemVerilog, UVM, testbench development, and automation with Python and MATLAB, with on‑site work in Palo Alto under ITAR guidelines.
United States Digital Space LLC is hiring a Design Verification Engineer (Silicon Engineering) to develop and verify next‑generation ASICs for space and ground infrastructures. You will join cross‑functional teams to design, test, and validate complex digital designs used in Starlink deployment.
The role emphasizes SystemVerilog, UVM, testbench development, and automation with Python and MATLAB, with on‑site work in Palo Alto under ITAR guidelines.