Silicon Design Verification Engineer (Digital ASIC)

InvestedintheMission; Redmond (WA); On-site; USD 125,000 - 195,000; Full time

Benefits offered by this job

Stock options

Medical coverage

Paid vacation

Paid holidays

Disability insurance

Job summary

SpaceX is seeking a Design Verification Engineer to verify digital ASICs for space-grade applications in Redmond, WA. You will work with cross-disciplinary teams to develop test benches, run regressions, and drive coverage closure for next‑gen chips powering Starlink infrastructure.

The role emphasizes hands-on verification, automation with Python and MATLAB, and collaboration across firmware, design, and product engineering to deliver reliable, high‑performance silicon for global connectivity.

Qualifications

• Bachelor's degree required in EE/CS/CE.
• 1+ year of design verification/test bench experience.
• Advanced degree is a plus.

Responsibilities

• Verify digital ASIC at block and system level.
• Write and review test plans; develop test harnesses and sequences.
• Develop SystemVerilog testbench infrastructure (UVM and non-UVM).
• Execute test plans; run regressions; achieve coverage goals.
• Automate test cases with Python and MATLAB.
• Contribute to pre-silicon verification, bring-up and post-silicon validation.
• Hands-on self-starter to verify complex digital designs.

Skills

SystemVerilog

UVM

Python

C/C++

Testbench development

RTL verification

OO programming

Education

Bachelor's degree in electrical engineering, computer science or computer engineering

Advanced degree in electrical engineering or computer engineering

Tools

MATLAB

Git

Shell scripting

Job description

SpaceX is seeking a Design Verification Engineer to verify digital ASICs for space-grade applications in Redmond, WA. You will work with cross-disciplinary teams to develop test benches, run regressions, and drive coverage closure for next‑gen chips powering Starlink infrastructure.

The role emphasizes hands-on verification, automation with Python and MATLAB, and collaboration across firmware, design, and product engineering to deliver reliable, high‑performance silicon for global connectivity.