DFT Engineer

VisLab (an Ambarella Inc. company); Kentucky; On-site; USD 140,000 - 150,000; Full time

Benefits offered by this job

RSU grants

Annual RSU grants

Competitive benefits

Job summary

Ambarella, a world leader in edge AI semiconductors, is seeking an experienced DFT engineer to join our team in Kentucky. You will drive DFT implementation from RTL to post-production for a multi-million gate Computer Vision SoC, delivering robust patterns and test strategies.

Collaborate with design and product engineering, verify DFT via timing simulations, and support ATE bring-up and silicon production.

Qualifications

• MS in Electrical / Computer Engineering or BS with 1-5 years in DFT implementation.
• Knowledge of DFT fundamentals.
• Knowledge of Logic design and timing.
• Knowledge of Verilog and Python.
• Knowledge of Mentor Tessent tools is a plus.
• Knowledge of scan diagnostics is a plus.

Responsibilities

• DFT implementation from RTL to Post-Production for a multi-million gate Computer Vision SoC.
• Analyze clocking and implement clock control structure for at-speed scan testing.
• Develop/Generate high-quality scan and mbist patterns.
• DFT Verification (including post place-and-route timing simulations).
• Work with Product Engineering team to bring up scan & mbist patterns on ATE.
• Support silicon production activities including failure diagnosis and test optimization.

Skills

Knowledge of DFT fundamentals

Knowledge of logic design and timing

Verilog

Python

Scan diagnostics

Education

MS in Electrical / Computer Engineering

BS in Electrical/Computer Engineering with 1-5 years experience

Tools

Mentor Tessent tools

MBIST tooling

Job description

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring artificial intelligence to all types of everyday devices, for enhanced environmental perception in everything from security cameras to robots to autonomous vehicles.

Position Responsibilities

• DFT implementation (Scan, Compression, MBIST, LBIST, and Streaming Scan Network) from RTL to Post-Production for complex multi-million gate Computer Vision SoC.
• Analyze clocking scheme and implement clock control structure for at-speed scan testing
• Develop/Generate high-quality scan and mbist patterns.
• DFT Verification (including post place-and-route timing simulations).
• Work with Product Engineering team to bring up scan & mbist patterns on ATE.
• Support silicon production activities including failure diagnosis and test optimization.

Minimum Requirements

• MS in Electrical / Computer Engineering or BS in Electrical/Computer Engineering with 1-5 years of experience in DFT implementation
• Knowledge of DFT fundamentals
• Knowledge of Logic design and timing
• Knowledge of Verilog and Python
• Knowledge of Mentor Tessent tools is a plus
• Knowledge of scan diagnostics is a plus

The base salary range is $140,000 - $150,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits.