DFT Engineer Intern

VisLab (an Ambarella Inc. company); Headquarters (KY); On-site; USD 120,000 - 150,000; Full time

Job summary

VisLab (an Ambarella Inc. company) in Kentucky is seeking a qualified engineer to design and verify DFT features for AI vision processors used in edge applications.

You will automate DFT flows, perform timing analysis, and verify fault coverage, with emphasis on Verilog and scripting. This role requires an MSEE and knowledge of DFT fundamentals, and offers opportunities to contribute to multi-million gate SoC projects.

Qualifications

• MSEE in Electrical/Computer Engineering required.
• Knowledge of DFT fundamentals.
• Knowledge of logic design and static timing analysis.
• Knowledge of Verilog and scripting languages.
• Knowledge of AI assisted programming.

Responsibilities

• Logic design to support DFT features.
• Automate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoC.
• Verification of DFT logic and analysis of fault coverage.
• Timing analysis for DFT modes.

Skills

DFT fundamentals

Logic design

Static timing analysis

Verilog

Scripting language

AI assisted programming

Education

MSEE in Electrical / Computer Engineering

Job description

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Position Responsibilities:

• Logic Design to support DFT features
• Automate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoC
• Verification of DFT Logic and analysis of fault coverage
• Timing analysis for DFT Modes

Minimum Requirements

• MSEE in Electrical / Computer Engineering
• Knowledge of DFT fundamentals
• Knowledge of Logic design & Static timing analysis
• Knowledge of Verilog and any scripting language
• Knowledge of AI assisted programming