DFT Engineer

Ambarella; Northern (KY); Hybrid; USD 140,000 - 150,000; Full time

Benefits offered by this job

new-hire RSU grants

annual RSU grants

other highly competitive benefits

Job summary

Ambarella, a worldwide leader in edge AI semiconductors, seeks a DFT engineer to drive scan and mbist for a multi-million gate Computer Vision SoC. You will oversee RTL-to-production DFT, clock control for at-speed testing, and pattern generation, with close collaboration to Product Engineering for ATE bring-up.

There is a base salary range of $140,000-$150,000, with RSU grants and other competitive benefits.

Qualifications

• MS in Electrical/Computer Engineering or BS in Electrical/Computer Engineering with 1-5 years of DFT experience.
• Knowledge of DFT fundamentals.
• Knowledge of logic design and timing.
• Knowledge of Verilog and Python.
• Knowledge of Mentor Tessent tools is a plus.
• Knowledge of scan diagnostics is a plus.

Responsibilities

• DFT implementation from RTL to Post-Production for complex multi-million gate SoC.
• Analyze clocking and implement clock control for at-speed scan testing.
• Develop high-quality scan and mbist patterns.
• DFT Verification including post place-and-route timing simulations.
• Collaborate with Product Engineering to bring up scan/mbist on ATE.
• Support silicon production activities including failure diagnosis and test optimization.

Skills

DFT implementation

Clock control

Timing analysis

Verilog

Python

Scan diagnostics

Education

MS in Electrical/Computer Engineering

BS in Electrical/Computer Engineering with 1-5 years experience

Tools

Mentor Tessent tools

Job description

AI Vision Processors For Edge Applications. Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring artificial intelligence to all types of everyday devices, for enhanced environmental perception in everything from security cameras to robots to autonomous vehicles.

Position Responsibilities

• DFT implementation (Scan, Compression, MBIST, LBIST, and Streaming Scan Network) from RTL to Post-Production for complex multi-million gate Computer Vision SoC.
• Analyze clocking scheme and implement clock control structure for at-speed scan testing.
• Develop/Generate high-quality scan and mbist patterns.
• DFT Verification (including post place-and-route timing simulations).
• Work with Product Engineering team to bring up scan & mbist patterns on ATE.
• Support silicon production activities including failure diagnosis and test optimization.

Minimum Requirements

• MS in Electrical / Computer Engineering or BS in Electrical/Computer Engineering with 1-5 years of experience in DFT implementation.
• Knowledge of DFT fundamentals.
• Knowledge of Logic design and timing.
• Knowledge of Verilog and Python.
• Knowledge of Mentor Tessent tools is a plus.
• Knowledge of scan diagnostics is a plus.

The base salary range is $140,000 - $150,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits.

Benefits

• new-hire RSU grants
• annual RSU grants
• other highly competitive benefits

Combining technical expertise and a commitment to quality, Ambarella has established itself as the industry standard for excellence in video performance by offering pristine imagery, efficient compression, and low-power operation. For our next phase of growth, we are looking for talented team members to help us deliver our advanced computer vision algorithms to tomorrow’s intelligent video products. Our target applications include autonomous vehicles, intelligent video surveillance, self-flying drones, smart wearable cameras, 360-degree immersive video, and more.