Design Verification Intern: Pre-Silicon & Mixed-Signal

118-WW TMG MFG OPS; Dallas (TX); On-site; USD 32,000 - 52,000; Full time

Job summary

Texas Instruments seeks a Design Verification intern to help shape pre-silicon verification. You will develop detailed verification plans and build test benches and simulations for DUT behavior, while running coverage regressions for mixed-signal circuits.

You will track status, communicate issues, and collaborate with regression tools to drive DV improvements, including timing checks between analog and digital blocks.

Qualifications

• Pursuing graduate degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering.
• GPA of 3.0/4.0 or higher required.
• Strong communication skills and relationship-building abilities.

Responsibilities

• Developing detailed verification plans with design and system teams.
• Developing test benches, tests and simulations for DUT behavior.
• Running coverage regressions to meet coverage goals for SystemVerilog models.
• Tracking and communicating verification status, issues, and concerns.
• Working with regression tools and scripts for regression analysis.
• Verifying chip-level timing between analog and digital circuits using RTL and Gates+SDF.
• Contributing to DV strategy, tools, methods and flows for quality and efficiency.

Skills

Verbal communication

Written communication

Stakeholder management

Interpersonal skills

Team collaboration

Initiative

Time management

Analytical skills

Problem solving

Education

Graduate degree in EE/CE

GPA 3.0/4.0 minimum

Job description

Texas Instruments seeks a Design Verification intern to help shape pre-silicon verification. You will develop detailed verification plans and build test benches and simulations for DUT behavior, while running coverage regressions for mixed-signal circuits.

You will track status, communicate issues, and collaborate with regression tools to drive DV improvements, including timing checks between analog and digital blocks.