Design Verification Engineer Intern (Bachelors)

Texas Instruments; Knoxville (TN); On-site; USD 25,000 - 30,000; Part time

Job summary

Texas Instruments is seeking a Design Verification intern to help develop verification plans, build test benches, and run coverage regressions for mixed-signal and digital DUTs. You will track status and collaborate with design teams to ensure pre-silicon success.

The role involves using regression tools, RTL/Gates+SDF verification, and constrained-random stimulus, with an emphasis on improving DV strategies and workflows.

Qualifications

• Pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering.
• GPA of 3.0/4.0 or higher.

Responsibilities

• Develop detailed verification plans with design and system teams to ensure pre-silicon verification success.
• Create test benches, tests and simulations for DUT behavior.
• Run coverage regressions to meet coverage goals for SystemVerilog models of mixed-signal and digital circuits.

Skills

Stakeholder relationships

Verbal & written communication

Ramp on new systems

Interpersonal skills

Team collaboration

Initiative & drive

Time management

Education

Bachelors in Electrical Engineering, Computer Engineering or Electrical & Computer Engineering

Tools

SystemVerilog

DV tools

RTL

Gates+SDF

Job description

Texas Instruments is seeking a Design Verification intern to help develop verification plans, build test benches, and run coverage regressions for mixed-signal and digital DUTs. You will track status and collaborate with design teams to ensure pre-silicon success.

The role involves using regression tools, RTL/Gates+SDF verification, and constrained-random stimulus, with an emphasis on improving DV strategies and workflows.