Data Center SoC Verification Engineer

Qualcomm; San Diego (CA); On-site; USD 115,600 - 173,400; Full time

Job summary

Qualcomm Technologies, Inc. in San Diego seeks a Design Verification Engineer to verify next-generation Data Center SoCs powering AI, HPC, and cloud infrastructure.

You will design scalable verification environments, create constrained-random tests, and drive coverage closure to ensure first-silicon success. As a hands-on engineer, you will debug RTL/testbench, integrate with architects and software teams, and contribute to methodology improvements.

Qualifications

• Bachelor's or master's degree in electrical/computer engineering or related field.
• 2+ years of design verification experience with SoCs.
• Strong knowledge of SystemVerilog, UVM, C, SVA, and coverage-driven verification.

Responsibilities

• Develop verification plans for SoC, subsystem, and IP-level features.
• Design scalable SystemVerilog/UVM-based verification environments.
• Create directed and constrained-random test scenarios.
• Debug RTL, testbench, and integration issues with design teams.
• Drive coverage closure using functional and code coverage metrics.

Skills

SystemVerilog

UVM

C

SVA

Coverage-Driven Verification

Debugging RTL/testbench

Python scripting

Education

Bachelor's or Master's in Electrical/Computer Engineering or related field

Tools

Emulation platforms (Veloce/Palladium/ZeBu)

Job description

Qualcomm Technologies, Inc. in San Diego seeks a Design Verification Engineer to verify next-generation Data Center SoCs powering AI, HPC, and cloud infrastructure.

You will design scalable verification environments, create constrained-random tests, and drive coverage closure to ensure first-silicon success. As a hands-on engineer, you will debug RTL/testbench, integrate with architects and software teams, and contribute to methodology improvements.