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Cadence seeks a senior design/verification engineer to join the HSV Engagement/Support Team in California. You will collaborate with customers, field AE teams and R&D to provide technical support for Palladium, Protium and Virtual Protocol products, addressing complex hardware and software challenges.
Requires MS-EE/CE with 8+ years in design/verification of digital designs or related support roles; strong HDL (Verilog, SystemVerilog, VHDL); Unix/Linux scripting; UVM is a plus.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As an integral member of the HSV Engagement/Support Team, you will work with our customers and field AE teams and R&D groups to provide technical support for our Palladium, Protium and Virtual Protocol (PDAPP) products. You will enjoy the experience and challenge in working with a broad spectrum of designs and customers.
The annual salary range for California is $185,500 to $344,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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