Custom Memory Design Lead — SRAM & Register File

NUVACORE; Austin (TX); Presencial; USD 180 000 - 260 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

None

Resumo da oferta

NUVACORE is seeking a Custom Design Lead to steer a team developing high-performance memory blocks (SRAMs and register files) for next-gen CPUs. You will drive schematic, layout, and signoff, coordinating with RTL/DFT, foundries, and CAD teams to ensure silicon success.

You will define memory specifications, optimize timing and power, and advance automation across design flows, maturing processes and tools for faster, reliable tape-outs.

Qualificações

• 12+ years in custom memory circuit design (SRAMs and/or Register files).
• Hands-on transistor-level design in advanced CMOS nodes.
• Proficient with EDA tools for schematic, layout, extraction, characterization.
• Experience delivering production-level custom memory IP with silicon-validated PPA.
• Knowledge of end-to-end signoff: DRC/LVS/antenna, extraction, STA, EM/IR.

Responsabilidades

• Lead a small team of engineers for custom memories development.
• Oversee schematic development and characterization to optimize PPA.
• Supervise layout, macro floorplanning, routing, and PDV closure.
• Manage end-to-end memory IP signoff across PVT with DRC/LVS/antenna and extraction.
• Collaborate with Foundry/PDK, CAD, Physical Design, RTL and DFT teams to optimize IP.
• Provide explicit memory specs to RTL and drive design methodologies and automation.

Conhecimentos

custom memory design

SPICE simulations

EDA tools

signoff workflows

Python

team leadership

PPA optimization

DFT/CCS

Formação académica

BS/MS/PhD in Electrical Engineering

Ferramentas

SPICE

Liberty/CCS

Python

Perl

TCL

Descrição da oferta de emprego

NUVACORE is seeking a Custom Design Lead to steer a team developing high-performance memory blocks (SRAMs and register files) for next-gen CPUs. You will drive schematic, layout, and signoff, coordinating with RTL/DFT, foundries, and CAD teams to ensure silicon success.

You will define memory specifications, optimize timing and power, and advance automation across design flows, maturing processes and tools for faster, reliable tape-outs.