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Apple Inc. is seeking aCPU block-level physical design engineer in Santa Clara, CA. You will drive RTL-to-GDS design convergence using logic synthesis and PNR, delivering block-level PD with backend closure and yield improvements.
You will collaborate with CAD and PD teams on tool features and optimizations, plus work with cross-functional teams on floorplanning, timing, power, reliability, and testability for complex CPU designs.
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there’s no telling what you could accomplish. Dynamic, hard‑working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block‑level physical design.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools.
By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
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Apple accepts applications to this posting on an ongoing basis.