CPU Implementation Engineer

Apple Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Apple Inc. in Austin, TX, is seeking engineers for CPU block-level implementation within the Apple Silicon Engineering Group (SEG). You will work with micro-architects to define memory subsystem trade-offs and drive the RTL-to-GDS flow, balancing area, frequency, power and performance.

The role requires a BS and 3+ years of relevant experience, with scripting in Perl or TCL. Join us to help deliver the next generation of Apple hardware and contribute to cutting-edge design in a fast-paced

Qualifications

• BS degree and 3+ years of relevant industry experience.
• Experience with scripting in Perl or TCL.

Responsibilities

• Define memory subsystem with micro-architects and trade-offs for area, frequency, performance, and power.
• Drive RTL-to-GDS flow through synthesis and place-and-route to meet power and performance targets.
• Design delivery and validation with timing, area, reliability, testability, and power considerations.

Skills

Perl scripting

TCL scripting

High performance microprocessor

Logic design

Timing & power

Low power microarchitecture

Education

Bachelor's degree

Tools

Synthesis & place‑route tools

Job description

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product!Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.

Description

• Work extensively with Micro-architects to define memory subsystem, perform feasibility, make area, frequency, performance, power trade-offs and design and balance the pipeline stages.
• Drive RTL-to-GDS flow through synthesis and place-and-route targeting ambitious targets for power, performance, and area.
• Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power.

Minimum Qualifications

• Minimum BS and 3+ years of relevant industry experience
• Experience with scripting in Perl or TCL

Preferred Qualifications

• Familiarity with high performance microprocessor architecture
• Knowledge of logic design principles along with timing and power implications
• Understanding of low power microarchitecture and implementation techniques
• Design experience in deep sub‑micron technologies and device physics
• Experience using synthesis & place‑route tools

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants

Apple accepts applications to this posting on an ongoing basis.