CPU PD Engineer: RTL Feasibility & PPA

Nuvacore; Austin (TX); On-site; USD 140,000 - 250,000; Full time

Job summary

Nuvacore is building a ground-up high-performance, low-power CPU for next-generation workloads in Austin, Texas. As a CPU Physical Design Engineer, you will focus on delivering feedback to RTL teams to meet timing, power, and area targets.

You will lead or contribute to RTL feasibility studies, timing analysis, floor planning, and sign-off workflows, collaborating across CPU units, CAD, and performance modeling teams to drive successful tape-outs.

Qualifications

• BS/MS degree in CPU design or related field.
• 5+ years of CPU physical design experience for IC roles or 12+ years for lead roles.
• Strong foundation in µArch concepts and PD sign-off processes.
• Experience with RTL synthesis, floor planning, timing ECOs, and PD sign-off flows.
• Proficiency with Python, TCL, and scripting for design automation.

Responsibilities

• Lead RTL/micro-architecture feasibility studies with actionable feedback.
• Drive PPA outcomes for CPU units focusing on timing closure and power optimization.
• Collaborate across CPU units, CAD, RTL/micro-architecture, and performance modeling teams.
• Own the RTL intake process for the PD team and ensure design readiness before RTL handoff.

Skills

Micro-architecture concepts

RTL feasibility

Timing analysis

PPA optimization

Cross-functional collaboration

End-to-end PD closure

Communication skills

Education

BS or MS in EE/CS

Tools

Synopsys EDA tools

Cadence EDA tools

Job description

Nuvacore is building a ground-up high-performance, low-power CPU for next-generation workloads in Austin, Texas. As a CPU Physical Design Engineer, you will focus on delivering feedback to RTL teams to meet timing, power, and area targets.

You will lead or contribute to RTL feasibility studies, timing analysis, floor planning, and sign-off workflows, collaborating across CPU units, CAD, and performance modeling teams to drive successful tape-outs.