Senior CPU Micro-Architect & RTL Engineer

Nuvacore; Austin (TX); On-site; USD 140,000 - 300,000; Full time

Job summary

Nuvacore is building a high-performance, low-power CPU for next-generation compute workloads in Austin, TX. You will contribute as a CPU Micro-Architect/RTL Engineer, shaping architecture, RTL, verification, and physical design across the full pipeline.

Join a team focused on power and performance with opportunities to influence the design from specification through implementation and debugging, including AI-assisted RTL tooling and cross-functional collaboration.

Qualifications

• BS or MS with 15+ years experience in high-performance, low-power CPU design
• Experience with Verilog, debugging, simulation; ideally with AI tools aiding RTL coding
• Solid understanding of logic and physical design impact on timing, power, and area
• Experience with RISC-V, ARM64, or x86 ISA and their micro-architectural implications

Responsibilities

• Micro-architecture development and specification from performance-driven design strategy
• RTL design to meet power, performance, area and timing goals
• Verification support through testbench development, formal methods, simulation/emulation
• Performance exploration to verify RTL meets targeted performance
• Physical design collaboration to implement and verify timing, power and area targets

Skills

Verilog

AI tools

C

C++

Perl

Python

RISC-V

ARM64

x86

Education

Bachelor's or Master's degree in Electrical Engineering or related field

Job description

Nuvacore is building a high-performance, low-power CPU for next-generation compute workloads in Austin, TX. You will contribute as a CPU Micro-Architect/RTL Engineer, shaping architecture, RTL, verification, and physical design across the full pipeline.

Join a team focused on power and performance with opportunities to influence the design from specification through implementation and debugging, including AI-assisted RTL tooling and cross-functional collaboration.