CPU Implementation Engineer: Power, Performance & RTL

Apple Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Apple Inc. in Austin, TX, is seeking engineers for CPU block-level implementation within the Apple Silicon Engineering Group (SEG). You will work with micro-architects to define memory subsystem trade-offs and drive the RTL-to-GDS flow, balancing area, frequency, power and performance.

The role requires a BS and 3+ years of relevant experience, with scripting in Perl or TCL. Join us to help deliver the next generation of Apple hardware and contribute to cutting-edge design in a fast-paced

Qualifications

• BS degree and 3+ years of relevant industry experience.
• Experience with scripting in Perl or TCL.

Responsibilities

• Define memory subsystem with micro-architects and trade-offs for area, frequency, performance, and power.
• Drive RTL-to-GDS flow through synthesis and place-and-route to meet power and performance targets.
• Design delivery and validation with timing, area, reliability, testability, and power considerations.

Skills

Perl scripting

TCL scripting

High performance microprocessor

Logic design

Timing & power

Low power microarchitecture

Education

Bachelor's degree

Tools

Synthesis & place‑route tools

Job description

Apple Inc. in Austin, TX, is seeking engineers for CPU block-level implementation within the Apple Silicon Engineering Group (SEG). You will work with micro-architects to define memory subsystem trade-offs and drive the RTL-to-GDS flow, balancing area, frequency, power and performance.

The role requires a BS and 3+ years of relevant experience, with scripting in Perl or TCL. Join us to help deliver the next generation of Apple hardware and contribute to cutting-edge design in a fast-paced