CPU Implementation Engineer

Apple; Austin (TX); On-site; USD 80,000 - 150,000; Full time

Job summary

An innovative company is seeking a CPU Implementation Engineer to contribute to the design and implementation of high-performance microprocessors. In this role, you will be responsible for all phases of physical design, from feasibility studies to GDSII delivery. Collaborate with talented teams to drive the RTL-to-GDS flow, ensuring optimal power, performance, and area goals. This is an exciting opportunity to work in a dynamic environment that values creativity and diversity, making a significant impact in the tech industry.

Qualifications

• Master's degree in relevant fields required.
• Experience in RTL synthesis and static timing analysis essential.

Responsibilities

• Perform front-end implementation tasks and collaborate on design.
• Drive RTL-to-GDS flow and validate physical design aspects.

Skills

RTL synthesis

Static timing analysis

Power analysis

Scripting (Python, Tcl, Perl)

Hardware coding (Verilog)

Education

Master's degree in Computer Engineering

Master's degree in Electrical Engineering

Tools

CAD tools

Job description

CPU Implementation Engineer

Location: Austin, Texas, United States

Department: Hardware

Summary: Posted: May 08, 2025 | Weekly Hours: 40 | Role Number: 200602754

Apple is a place where extraordinary people gather to do their best work. We create products and experiences that inspire innovation and become essential to people's lives. Our diversity fuels our creativity and drives our success.

Description

Apple Inc. has an opening in Austin, Texas, for a role responsible for all phases of physical design implementation of high-efficiency, high-performance microprocessors, from RTL to GDSII delivery. Responsibilities include:

1. Perform front-end implementation tasks such as feature feasibility studies, synthesis, static timing analysis, and power analysis.
2. Collaborate with micro-architects on memory subsystem design, feasibility, and trade-offs in area, frequency, performance, and power.
3. Drive RTL-to-GDS flow through synthesis and place-and-route, targeting power, performance, and area goals.
4. Generate and implement Embedded Configurable Operating System (ECOs).
5. Work with CAD and methodology teams to develop physical design methodologies.
6. Coordinate with multi-disciplinary teams to validate physical design aspects including timing, area, reliability, testability, and power.

Minimum qualifications include a Master's degree in Computer Engineering, Electrical Engineering, or related fields, with experience in RTL synthesis, floor planning, place-and-route, static timing analysis, logical equivalency check, power analysis, scripting (Python, Tcl, Perl), and hardware coding (Verilog).

Apple is an equal opportunity employer committed to diversity and inclusion. We do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics. Learn more about your EEO rights here. Apple participates in the E-Verify program and is committed to providing reasonable accommodations for applicants with disabilities. We are a drug-free workplace and consider qualified applicants with criminal histories in accordance with applicable laws. For San Francisco applicants, please review the local Fair Chance Ordinance guidelines. Massachusetts applicants should note the prohibition on lie detector tests as a condition of employment.