Circuit Design Engineer - Library

Apple; Santa Clara (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Apple is seeking a Circuit Design Engineering Lead to guide a talented team within the Digital Design Engineering group. You will lead the design of high-performance, low-power standard cells and drive PPA improvements across CPU, SOC, and GPU integration efforts.

You will manage the development of new circuits, coordinate with foundries on iPDK requirements, and mentor a small team to deliver cutting-edge ASIC designs for market-ready products.

Qualifications

• Bachelor's degree required with 3+ years of relevant circuit design experience.
• 3+ years of standard cells circuit development experience.
• Experience leading and mentoring a small team.
• Strong influence and interpersonal skills; ability to work with multi-functional teams.
• Knowledge of standard cell layout, DRM, DRC/LVS, PDV flows, and layout rules.

Responsibilities

• Drive development of high-performance, low-power standard cells to improve design PPA.
• Develop optimal level shifters and retention designs for low-power requirements.
• Identify next-generation ideas to push PPA improvements further.
• Collaborate with CPU, SoC and GPU teams on chip-level integration requirements.
• Perform circuit QA checks and develop new methodologies for design validation.
• Coordinate with foundries on DRM-compliant layout checkers and iPDK requirements.
• Plan and drive the development of new circuits and technology node enablement.
• Manage migration to new PDK/PDV for standard cells and releases.

Skills

Standard cells dev

Circuit methodologies

Team leadership

Interpersonal skills

Layout rules PDV

Virtuoso proficiency

Power management cells

Circuit robustness analysis

Perl/TCL scripting

Education

Bachelor's degree

Tools

Virtuoso

Job description

Summary

Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? Do you have a passion for crafting entirely new solutions? Do you love building without precedent? As part of our Digital Design Engineering group, you’ll take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed, bringing visionary ideas to the real world. Your efforts will be groundbreaking, often literally. Join us, and you’ll help design the tools that allow us to bring customers experiences they’ve never before envisioned. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Circuit Design Engineering Lead. In this highly visible role, you will be at the heart of a processor design effort, leading custom digital circuits team and library development, making a critical impact delivering products to market quickly.

Description

Imagine yourself at the center of our SOC design effort, collaborating with all disciplines, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of talented engineers.

As a Circuit Design Engineering Lead for the custom circuits team, you will perform the following:

• Drive development of high performance, low power optimized standard cells to improve design PPA.
• Drive development of optimal level shifters, retention designs, etc that cater to today’s Low Power Design Requirements.
• Identify next generation of new ideas to drive PPA improvements further
• Engage with CPU, SOC and GPU teams on chip level integration requirements.
• Drive Circuit QA checks & analysis, develop new methodologies based on new design requirements.
• Work with foundries on DRM complaint layout checkers and iPDK requirements.
• Plan & drive development of designs like new circuits & tech node enablement.
• Manage migration to new PDK, PDV of standard cells & releases.

Minimum Qualifications

Bachelor's Degree + minimum of 3 years of experience

Preferred Qualifications

• We are looking for applicants with 3+ years of experience in Standard cells circuit development.
• Proven experience in developing, driving & implementing circuit methodologies
• Proven experience leading & mentoring a small team
• Strong influence, excellent interpersonal skills & able to work with multi-functional teams
• Knowledge of standard cell layout, DRM, DRC/LVS decks, PDV flows, Virtuoso.Design experience in advanced tech node device behavior with understanding of layout rules.
• Design experience in flop, complex Standard Cells design & Power Management Cells.
• Knowledge of circuit robustness analysis
• Experience in scripting in Perl and/or TCL.