Circuit Design Engineer - Library

Apple Inc.; Beaverton (OR); On-site; USD 120,000 - 190,000; Full time

Job summary

Apple Inc. in Beaverton, OR is seeking a Circuit Design Engineering Lead to drive development of high performance, low power standard cells and contribute to chip-level integration for SOC designs.

You will lead a small, multi-disciplinary team, collaborate with CPU/SOC/GPU teams, manage PDV/DRM checks, and migrate designs to new PDKs while delivering robust, market-ready IP on aggressive timelines. This role demands strong influence, mentoring, and hands-on optimization of PPA to ensure design

Qualifications

• 3+ years of experience in Standard cells circuit development.
• Proven experience leading & mentoring a small team.
• Strong influence and interpersonal skills; able to work with multi-functional teams.
• Knowledge of standard cell layout, DRM, DRC/LVS decks, PDV flows, Virtuoso.
• Design experience in advanced tech node device behavior with layout rule understanding.
• Knowledge of circuit robustness analysis.
• Experience scripting in Perl and/or TCL.

Responsibilities

• Drive development of high performance, low power optimized standard cells to improve design PPA.
• Drive development of optimal level shifters, retention designs, etc that cater to today’s Low Power Design Requirements.
• Identify next generation ideas to drive PPA improvements.
• Engage with CPU, SOC and GPU teams on chip level integration requirements.
• Drive Circuit QA checks & analysis, develop new methodologies based on new design requirements.
• Work with foundries on DRM compliant layout checkers and iPDK requirements.
• Plan & drive development of designs like new circuits & tech node enablement.
• Manage migration to new PDK, PDV of standard cells & releases.

Skills

Standard cells circuit development

Mentoring a small team

Interpersonal skills

Cross-functional collaboration

PDV flows

Education

Bachelor's Degree

Tools

Virtuoso

Job description

Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? Do you have a passion for crafting entirely new solutions? Do you love building without precedent? As part of our Digital Design Engineering group, you’ll take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed, bringing visionary ideas to the real world. Your efforts will be groundbreaking, often literally. Join us, and you’ll help design the tools that allow us to bring customers experiences they’ve never before envisioned. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Circuit Design Engineering Lead. In this highly visible role, you will be at the heart of a processor design effort, leading custom digital circuits team and library development, making a critical impact delivering products to market quickly.

Description

Imagine yourself at the center of our SOC design effort, collaborating with all disciplines, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of talented engineers. As a Circuit Design Engineering Lead for the custom circuits team, you will perform the following:

• Drive development of high performance, low power optimized standard cells to improve design PPA.
• Drive development of optimal level shifters, retention designs, etc that cater to today’s Low Power Design Requirements.
• Identify next generation of new ideas to drive PPA improvements further
• Engage with CPU, SOC and GPU teams on chip level integration requirements.
• Drive Circuit QA checks & analysis, develop new methodologies based on new design requirements.
• Work with foundries on DRM complaint layout checkers and iPDK requirements.
• Plan & drive development of designs like new circuits & tech node enablement.
• Manage migration to new PDK, PDV of standard cells & releases.

Minimum Qualifications

• Bachelor's Degree + minimum of 3 years of experience

Preferred Qualifications

• We are looking for applicants with 3+ years of experience in Standard cells circuit development.
• Proven experience leading & mentoring a small team
• Strong influence, excellent interpersonal skills & able to work with multi-functional teams
• Knowledge of standard cell layout, DRM, DRC/LVS decks, PDV flows, Virtuoso.
• Design experience in advanced tech node device behavior with understanding of layout rules.
• Knowledge of circuit robustness analysis
• Experience in scripting in Perl and/or TCL.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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