ASIC Verification Engineer - Next-Gen Switching & Emulation

Cisco; Egypt (PA); On-site; USD 110,000 - 150,000; Full time

Job summary

Cisco Common ASIC Group is hiring an ASIC Verification Engineer to advance verification across simulation, emulation, and bring‑up of next‑generation switches.

You will collaborate with design and hardware teams to verify blocks, develop robust test benches, and drive end‑to‑end verification, including coverage plans and regression debugging. A Master’s in engineering is preferred with 2–3 years of DV experience.

Qualifications

• Master’s degree in Electrical & Electronics or Computer Engineering with 2–3 years of Design Verification experience.

Responsibilities

• Drive existing projects and develop new verification work for next‑gen switching systems.
• Develop and upgrade test benches, including drivers, monitors, and sequences.
• Maintain test benches for block- and cluster‑level verification; update configurations and APIs.
• Collaborate with designers and verification engineers for cross‑block verification; write tests and debug regressions.
• Contribute to top‑level verification and emulation testing efforts.

Skills

SystemVerilog

UVM

DV environments

Python

C++

Education

Master’s degree in Electrical & Electronics or Computer Engineering

Tools

None

Job description

Cisco Common ASIC Group is hiring an ASIC Verification Engineer to advance verification across simulation, emulation, and bring‑up of next‑generation switches.

You will collaborate with design and hardware teams to verify blocks, develop robust test benches, and drive end‑to‑end verification, including coverage plans and regression debugging. A Master’s in engineering is preferred with 2–3 years of DV experience.