ASIC & FPGA Design Engineer Sr (E5) | Orlando, FL

Lockheed Martin

Orlando (FL)

On-site

USD 148,000 - 276,000

Full time

48 hours ago
Be an early applicant
Application generator

Get a reply from this employer — a resume and cover letter tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Medical, Dental, Vision
Flexible work arrangements
401(k) match

Job summary

Lockheed Martin Missiles and Fire Control (MFC) is seeking a Senior Staff FPGA Engineer to lead FPGA-based RF target-generation and HWIL simulation efforts. You will architect, implement, integrate, and verify high-performance digital signal-processing solutions for real-time radar and electronic-warfare test environments.

The role requires deep experience with AMD/Xilinx RFSoC devices, SystemVerilog, and FPGA-based data paths, with collaboration across systems, software, and hardware teams to

Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline, with significant relevant professional experience.
  • Six+ years of experience with FPGA Firmware development.
  • Extensive experience designing and implementing FPGA-based systems.
  • Proficiency in SystemVerilog.
  • Experience with AMD/Xilinx FPGA development tools, including Vivado and associated simulation and debugging tools.
  • Experience developing FPGA-based digital signal-processing functions.
  • Experience with high-speed data interfaces, clock-domain crossing, timing closure, and FPGA resource optimization.
  • Experience performing hardware integration and troubleshooting using laboratory equipment such as oscilloscopes, spectrum analyzers, signal generators, and logic analyzers.
  • Understanding of digital communications, sampled-data systems, signal processing, and RF fundamentals.
  • Active secret security clearance

Responsibilities

  • Serve as a technical expert for FPGA-based RF Target Generation and HWIL system development.
  • Develop and maintain FPGA and RFSoC architectures supporting real-time waveform generation, signal processing, data movement, and system control.
  • Design, implement, simulate, and verify FPGA logic using SystemVerilog.
  • Develop RFSoC solutions incorporating high-speed ADCs/DACs, digital up/down conversion, numerically controlled oscillators, channelization, filtering, modulation, and waveform playback.
  • Integrate FPGA designs with embedded processors, software applications, RF hardware, test equipment, and HWIL simulation infrastructure.
  • Perform system timing, latency, throughput, synchronization, and resource-utilization analyses.
  • Develop interfaces using technologies such as AXI4, JESD204, PCIe, Ethernet, Aurora, DDR memory, and high-speed serial transceivers.
  • Develop verification strategies, test benches, automated tests, and objective evidence demonstrating compliance with system requirements.
  • Collaborate with systems, software, hardware, RF, modeling and simulation, integration, and test engineers.

Skills

FPGA Firmware
SystemVerilog
RFSoC
Vivado
High-speed interfaces
HWIL
Digital signal processing
Clock-domain crossing
Verification
RF fundamentals

Education

Bachelor’s degree in Electrical/Computer Engineering

Tools

Vivado
ModelSim
HDL Coder
SystemVerilog simulators

Job description

Lockheed Martin Missiles and Fire Control (MFC) is seeking an experienced Senior Staff FPGA Engineer to lead the development of advanced RF target-generation capabilities for Hardware-in-the-Loop (HWIL) simulation systems.

In this role, the selected candidate will provide technical leadership for the architecture, design, implementation, integration, and verification of high-performance FPGA-based digital signal-processing solutions. The engineer will work with multidisciplinary teams to develop real-time RF stimulus and target-generation systems used to test and evaluate radar, seeker, electronic-warfare, and other RF-enabled products.

The ideal candidate will have extensive experience with AMD/Xilinx RFSoC devices, FPGA development, digital RF systems, and real-time HWIL environments. Responsibilities will span the full engineering lifecycle, from requirements development and architecture trades through laboratory integration, troubleshooting, qualification, and deployment.

Key Responsibilities
  • Serve as a technical expert for FPGA-based RF Target Generation and HWIL system development.
  • Develop and maintain FPGA and RFSoC architectures supporting real-time waveform generation, signal processing, data movement, and system control.
  • Design, implement, simulate, and verify FPGA logic using SystemVerilog.
  • Develop RFSoC solutions incorporating high-speed ADCs/DACs, digital up/down conversion, numerically controlled oscillators, channelization, filtering, modulation, and waveform playback.
  • Integrate FPGA designs with embedded processors, software applications, RF hardware, test equipment, and HWIL simulation infrastructure.
  • Perform system timing, latency, throughput, synchronization, and resource-utilization analyses.
  • Develop interfaces using technologies such as AXI4, JESD204, PCIe, Ethernet, Aurora, DDR memory, and high-speed serial transceivers.
  • Develop verification strategies, test benches, automated tests, and objective evidence demonstrating compliance with system requirements.
  • Collaborate with systems, software, hardware, RF, modeling and simulation, integration, and test engineers.
Basic Qualifications
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline, with significant relevant professional experience
  • Six+ years of experience with FPGA Firmware devlopment
  • Extensive experience designing and implementing FPGA-based systems.
  • Proficiency in SystemVerilog.
  • Experience with AMD/Xilinx FPGA development tools, including Vivado and associated simulation and debugging tools.
  • Experience developing FPGA-based digital signal-processing functions.
  • Experience with high-speed data interfaces, clock-domain crossing, timing closure, and FPGA resource optimization.
  • Experience performing hardware integration and troubleshooting using laboratory equipment such as oscilloscopes, spectrum analyzers, signal generators, and logic analyzers.
  • Understanding of digital communications, sampled-data systems, signal processing, and RF fundamentals.
  • Experience developing requirements, architecture documentation, design descriptions, verification procedures, and test reports.
  • Active secret security clearance
Desired Skills
  • Hands-on experience with AMD/Xilinx Zynq UltraScale+ RFSoC devices, evaluation platforms, and production RFSoC hardware.
  • Experience configuring and using RFSoC RF Data Converter tiles, multi-tile synchronization, digital up/down converters, mixers, NCOs, interpolation, and decimation.
  • Experience developing RF Target Generation, radar stimulation, electronic warfare, communications, or signal environment simulation systems.
  • Experience with real-time HWIL or closed-loop simulation systems.
  • Knowledge of radar or seeker phenomenology, including target returns, Doppler, range delay, amplitude and phase control, antenna effects, clutter, noise, and electronic countermeasures.
  • Experience implementing high-throughput waveform generation or signal processing pipelines.
  • Experience with MATLAB/Simulink, Python, C/C++, and model-based FPGA development tools such as HDL Coder or System Generator.
  • Experience with embedded Linux, bare-metal software, or processing-system development on Zynq/RFSoC platforms.
  • Experience with AXI4, AXI4-Stream, DMA, DDR memory controllers, PCIe, Ethernet, Aurora, JESD204, and high-speed serial transceivers.
  • Knowledge of clocking, synchronization, deterministic latency, phase coherence, and multi-channel calibration.
  • Experience with FPGA verification methodologies, including SystemVerilog assertions, constrained-random testing, UVM, code coverage, and hardware-based verification.
  • Experience implementing automated build, simulation, regression-test, and continuous-integration workflows.
  • Familiarity with Git or equivalent configuration-management systems.
Pay Information

Full-Time Salary Range: $148300.00 - $275500.00

At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow—both professionally and personally.

The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer.

Benefits offered:

Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.

  • Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.
  • For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

ASIC & FPGA Design Engineer Stf - E4
ASIC & FPGA Design Engineer Stf - E4

Lockheed Martin • Orlando (FL)

On-site
USD 121,000 - 224,000
Medical, Dental, Vision benefits
Flexible work arrangements
401(k) match
ASIC & FPGA Design Engineer Sr Stf - E5
ASIC & FPGA Design Engineer Sr Stf - E5

Lockheed Martin • Orlando (FL)

On-site
USD 148,000 - 276,000
ASIC & FPGA Design Engineer - E2
ASIC & FPGA Design Engineer - E2

Lockheed Martin • Orlando (FL)

On-site
USD 81,000 - 151,000
Senior FPGA Design Engineer Sr - E3
Senior FPGA Design Engineer Sr - E3

Lockheed Martin • Town of Owego (NY)

Hybrid
USD 98,000 - 182,000
Flexible work arrangements
401(k) match
Paid time off
+3
Electronics Engineer Sr - E3
Electronics Engineer Sr - E3

Lockheed Martin • Littleton (CO)

On-site
USD 96,000 - 178,000
Medical, Dental, Vision
401(k) match
Paid time off
+1
Staff RF Engineer- Grand Prairie, TX
Staff RF Engineer- Grand Prairie, TX

Lockheed Martin • Grand Prairie (TX)

On-site
USD 121,000 - 224,000
Medical, Dental, Vision
401(k) match
Flexible work arrangements
ASIC & FPGA Design Engineer Stf - E4
ASIC & FPGA Design Engineer Stf - E4

Lockheed Martin • Sunnyvale (CA)

On-site
USD 136,000 - 252,000
Medical insurance
Dental/Vision benefits
401(k) match
+1
ASIC & FPGA Design Engineer Stf - E4
ASIC & FPGA Design Engineer Stf - E4

Lockheed Martin • Boulder (CO)

On-site
USD 136,000 - 252,000
Medical, Dental, Vision
Flexible work arrangements
401(k) match
+9
ASIC & FPGA Design Engineer Sr
ASIC & FPGA Design Engineer Sr

Lockheed Martin • Boulder (CO)

On-site
USD 110,000 - 205,000
Flexible work arrangements
401(k) match
Paid time off
+2
Radio Frequency Engineer Stf - E4
Radio Frequency Engineer Stf - E4

Lockheed Martin • Liverpool Township (OH)

On-site
USD 121,000 - 224,000
Medical benefits
Dental benefits
Flexible work arrangements
+1