ASIC Formal Verification Engineer for TPU Hardware

Google Inc.; Sunnyvale (CA); On-site; USD 132,000 - 189,000; Full time

Benefits offered by this job

Bonus

Equity

Benefits

Job summary

A leading technology company is seeking an ASIC Formal Verification Engineer in Sunnyvale, CA. This role involves shaping the future of AI/ML hardware with a focus on TPU technology. Candidates should have a Bachelor's degree in Electrical Engineering or a related field, alongside 4 years of verification experience. The position offers a salary range of $132,000-$189,000 plus bonuses and benefits, with collaboration on groundbreaking innovations in computing power.

Qualifications

• 4 years of experience with formal and design verification.
• Experience working with verification tools.
• Excellent communication skills.

Responsibilities

• Plan the formal verification strategy.
• Utilize formal property verification tools.
• Contribute improvements to verification methodologies.
• Architect and implement verification components.

Skills

Formal verification

Experience with SystemVerilog or Verilog

Collaboration skills

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree or PhD

Tools

Jasper

VC Formal

Questa Formal

360-DV

Job description

A leading technology company is seeking an ASIC Formal Verification Engineer in Sunnyvale, CA. This role involves shaping the future of AI/ML hardware with a focus on TPU technology. Candidates should have a Bachelor's degree in Electrical Engineering or a related field, alongside 4 years of verification experience. The position offers a salary range of $132,000-$189,000 plus bonuses and benefits, with collaboration on groundbreaking innovations in computing power.