ASIC Engineer, Foundry and IP

Meta Careers

Sunnyvale (CA)

On-site

USD 146,000 - 209,000

Full time

3 days ago
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Job summary

Meta is building custom silicon for AI infrastructure, seeking an ASIC Engineer to drive PPA analysis, test chip tapeouts, and high-density standard cell design with foundry partners. You will simulate transistor-level behavior, manage library characterization, and evaluate memory compilers for optimized performance and power.

A strong scripting background helps automate large-scale evaluations. Join Meta in Sunnyvale, contributing to next-generation AI workloads.

Qualifications

  • 6+ years in a foundry team driving PPA analysis and benchmarking.
  • Deep understanding of CMOS device physics and digital design.
  • Proven track record in test chip tapeouts and end-to-end design ownership.

Responsibilities

  • Analyze and benchmark foundry processes with physical design teams to pick optimal technologies.
  • Run early PPA evaluations of foundation IP drops via preliminary PnR experiments.
  • Architect and characterize high-density standard cell libraries with foundry partners.
  • Run transistor-level simulations and manage automated library characterization flows.
  • Evaluate memory compilers based on PPA and trade-off metrics.

Skills

CMOS physics
Digital circuit design
Test chip tapeouts
PPA analysis
Python scripting
Cadence Virtuoso
HSPICE/Spectre

Tools

Cadence Virtuoso
HSPICE
Spectre
PnR tools
Python/TCL/Perl/Skills

Job description

Meta is building custom silicon to power the next generation of AI infrastructure and immersive computing experiences. The Infrastructure Silicon team is responsible for designing and delivering high-performance, power-efficient ASICs that underpin Meta's data center and AI workloads. We are looking for individuals with experience in foundry technology benchmarking and PPA analysis, stdcell circuit design and characterization, memory compiler PPA optimization and test chip design and testing.ASIC Engineer, Foundry and IP Responsibilities:Analyze and benchmark foundry process offering with physical design teams to identify optimal technologies for product roadmapsDrive early PPA evaluation of foundation IP drops by running preliminary PnR experiments to identify issues and opportunities for improvementArchitect, design, and characterize high-performance, low-power, and ultra-high-density standard cell libraries with foundry partners and Physical design teamsRun transistor-level simulations (SPICE), direct custom physical layouts, and manage automated library characterization flowsEvaluate, benchmark, and choose third-party memory compilers (SRAM, Register Files, ROM) based on rigorous PPA and trade-off metricsParticipate in physical implementation, and tape-out of silicon test chips targeted at proving out new foundation IP, custom structuresMinimum Qualifications:6+ years of experience in a foundry team driving PPA analysis and engineering army benchmarkingDeep understanding of CMOS device physics, digital circuit design, and advanced node layout constraintsProven track record of participating in test chip tapeouts. Hands-on experience in owning end to end design and sign-off of partitions on a test chipExpert-level command of design environments like Cadence Virtuoso, HSPICE, SpectreWorking knowledge of synthesis, PnR, STA and PDV tools to converge a block on a test chipHigh proficiency in scripting with Python, TCL, Perl, or SKILL to automate large-scale evaluation pipelines and data analysisPreferred Qualifications:8+ years of experience driving PPA analysis, selection and optimization of foundational IPs - Standard cells and memory compilers in particularExperience owning test chips as chip lead is preferredExperience driving DTCO optimization with foundry partners and design teams on advanced logic technologies is preferredExperience in bringing multiple sub-5nm, 3nm, or 2nm GAA (Gate-All-Around) complex test chips from initial architecture through to validationAbout Meta:Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.$146,000/year to $209,000/year + bonus + equity + benefitsIndividual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
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