ASIC Engineer, Performance Architecture and Modeling (University Grad)

Meta

Austin (TX)

On-site

USD 114,000 - 172,000

Full time

4 days ago
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Job summary

Meta's Silicon Engineering organization seeking an ASIC Engineer focused on performance architecture and modeling. You will define performance modeling strategies, develop cycle-accurate C++ models, and explore microarchitectural trade-offs for Meta's infrastructure ASICs.

Collaboration with architecture, RTL, and software teams is essential. You will build and calibrate workloads for ML training and inference, mentor engineers, and drive long-term modeling toolchains and automation.

Qualifications

  • Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent practical experience.
  • Master's or PhD in CS/CE/EE preferred.
  • Proficiency in C++ and Python for simulation and automation.
  • Experience in ASIC performance modeling and pre-silicon simulation for custom silicon.
  • Experience with data center, AI accelerator, or HPC workloads on custom silicon.
  • Experience with cycle-accurate or transaction-level models using C++/SystemC.
  • Familiarity with SystemVerilog/VHDL and simulation environments.

Responsibilities

  • Define and drive architectural performance analysis and modeling for custom ASICs.
  • Develop and maintain C++ models of AI chip IPs and subsystems for exploration and software development.
  • Develop workloads and kernels for ML training and inference.
  • Establish performance analysis methodologies, benchmarks, and bottleneck identification.
  • Collaborate with architecture, RTL, and physical design teams to translate requirements into specs.
  • Lead cross-functional technical reviews and communicate results to leadership.
  • Define long-term performance modeling roadmaps and tooling investments.

Skills

C++
Python
SystemC
ASIC performance modeling
Pre-silicon simulation
CUDA

Education

Bachelor's degree in CS/CE/EE or equivalent
Master's or PhD in CS/CE/EE (preferred)

Tools

SystemVerilog

Job description

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing in architecture, performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs designed for Meta's infrastructure. In this role, you will establish functional and performance modeling methodologies and long-term silicon roadmap strategy, as well as develop and analyze workloads, partnering with architecture, design, and software teams to ensure Meta's infrastructure silicon meets the demanding throughput, latency, and efficiency targets required at hyperscale.ASIC Engineer, Performance Architecture and Modeling (University Grad) Responsibilities:Drive microarchitectural exploration and trade-off analysis across compute, memory subsystem, interconnect, and I/O domains to inform silicon architecture decisionsDefine and own the performance modeling strategy for custom infrastructure ASICs, including development of cycle-accurate and transaction-level simulation environmentsDevelop and maintain C++ models of AI chip IPs and subsystems for architecture exploration, performance analysis, and software developmentDevelop low-level workloads and kernels for machine learning training and inference applicationsEstablish performance analysis methodologies, benchmarking frameworks, and bottleneck identification techniques across the full ASIC pipelineCollaborate with architecture, RTL design, and physical design teams to translate performance requirements into implementable microarchitectural specificationsPartner with software and systems teams to co-optimize workload scheduling, firmware, and driver behavior against silicon performance characteristicsLead cross-functional technical reviews and communicate performance modeling results and architectural recommendations to engineering leadershipDefine long-term performance modeling infrastructure roadmaps, including tooling, automation, and simulation platform investmentsMentor other engineers on performance modeling techniques, simulation methodology, and microarchitectural analysis best practicesIdentify and resolve performance gaps between modeled and measured silicon behavior through structured root-cause analysis and model calibrationMinimum Qualifications:Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining MetaCurrently has, or is in the process of obtaining a Master's or PhD degree in Computer Science, Computer Engineering, Electrical Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining MetaProficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis toolsExperience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designsExperience with the performance analysis of data center, AI accelerator, or high-performance computing workloads on custom siliconExperience developing cycle-accurate or transaction-level performance models using C++ and SystemC for complex digital systems, including processors, memory subsystems, or high-speed interconnectsExperience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teamsExperience with assembly programming languages, and with compiler technologiesPreferred Qualifications:Experience developing Python-based automation pipelines for simulation orchestration, regression testing, and performance data analysisExperience with AI numerics, data types, math functions, and precision/accuracy analysisExperience building or scaling performance modeling infrastructure for hyperscale data center ASICs, including network, storage, or AI inference accelerator designsExperience writing and optimizing compute/collective kernels in CUDA or equivalent GPU programming frameworksFamiliarity with post-silicon performance validation and model-to-hardware correlation methodologiesExperience with hardware description languages (e.g., SystemVerilog, VHDL) and simulation environments used in ASIC development flowsExperience with ML domain knowledge including GenAI inference and Attention mechanismsExperience with high-level synthesis, power-performance-area trade-off analysis, or PPA-driven microarchitectural optimizationAbout Meta:Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.$114,000/year to $172,000/year + bonus + equity + benefitsIndividual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
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