ASIC Design Verification Engineer, TPU Compute

Google; Sunnyvale (CA); On-site; USD 132,000 - 189,000; Full time

Job summary

An established industry player is seeking an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. In this exciting role, you will drive cutting-edge TPU technology that powers innovative applications used by millions. You will collaborate with a dynamic team to develop custom silicon solutions, ensuring the successful verification of complex digital designs. This position offers a unique opportunity to contribute to the architecture and verification of next-generation data center accelerators, making a significant impact in the world of hyperscale computing.

Benefits

Health insurance

Retirement plan

Wellness programs

Flexible working hours

Professional development

Employee discounts

Paid time off

Parental leave

Remote work options

Free meals

Qualifications

• 2+ years of experience with industry standard tools and methodologies.
• 6+ years of experience in design verification preferred.

Responsibilities

• Plan verification of digital design blocks and create verification environments.
• Debug tests with design engineers and close coverage measures.

Skills

SystemVerilog

Design Verification

UVM

Silicon Design

Digital Design

Education

Bachelor's degree in Computer Science or Electrical Engineering

Master's degree or PhD in Electrical Engineering

Tools

Industry-standard simulators

Revision control systems

Regression systems

Job description

Minimum qualifications:

+ Bachelor's degree in Computer Science, Electrical Engineering, a related field, or equivalent practical experience.

+ 2 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based Integrated Circuits (ICs) and chips.

+ Experience with SystemVerilog (i.e., SystemVerilog Assertions or functional coverage).

Preferred qualifications:

+ Master's degree or PhD in Electrical Engineering.

+ 6 years of experience in design verification.

+ Experience with UVM (Universal Verification Methodology).

+ Experience with industry-standard simulators, revision control systems and regression systems.

+ Experienced with the full verification life cycle.

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As an ASIC Design Verification Engineer, you will be part of a team developing ASICs used to accelerate computation in data centers. You will have responsibilities in areas such as project definition, design verification, and silicon bringup. You will participate in the architecture, documentation, and verification of the next generation of data center accelerators.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google (https://careers.google.com/benefits/) .

+ Plan the verification of digital design blocks, understand the design specification, and interact with design engineers to identify important verification scenarios.

+ Create a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM).

+ Identify and write all types of coverage measures for stimulus and corner-cases.

+ Debug tests with design engineers to deliver correct design blocks.

+ Close coverage measures to identify verification holes and to show progress towards tape-out.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.