Senior Design Verification Engineer, HW Compute Group

Amazon; Sunnyvale (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

An innovative tech firm is seeking a Senior Design Verification Engineer to join their HW Compute Group. This role involves defining verification methodologies, implementing test plans, and collaborating with multidisciplinary teams to architect hardware blocks. With a focus on cutting-edge technology, you'll work on projects that impact user experiences across various devices. If you're passionate about semiconductor verification and thrive in a dynamic environment, this could be the perfect opportunity for you to contribute to groundbreaking advancements.

Qualifications

• 10+ years of semiconductor verification experience with SystemVerilog and UVM.
• Experience with verification platforms: UVM test benches and FPGA.

Responsibilities

• Define verification methodology and implement test plans for subsystems.
• Collaborate with teams to architect and implement hardware blocks.

Skills

SystemVerilog

UVM

C/C++

Python

Debugging Skills

Education

Bachelor's degree in EE, CE, or CS

PhD in related fields

Tools

FPGA

Emulators

Job description

Senior Design Verification Engineer, HW Compute Group

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Description

The team that built the innovative Silicon IP AZ1 Neural Edge, powering the latest Echo devices, is looking for a Senior Design Verification Engineer. Part of Amazon Lab126, we revolutionized reading with Kindle and reimagined user experiences with Echo and Alexa. Help us build on the success of our first-generation ML edge accelerator.

Responsibilities

• Define verification methodology and implement test plans for subsystems and full chips.
• Participate in design verification and chip bring-up through assertions, debugging, test benches, and test harnesses.
• Contribute to lab bring-up in FPGA, emulation, or silicon, including scripting and data analysis.
• Collaborate with multidisciplinary teams to architect and implement hardware blocks.
• Create detailed verification plans and develop constrained-random environments using SystemVerilog and UVM.
• Write tests in C, identify coverage measures, debug issues, and ensure verification completeness.

Qualifications

Basic:

• Bachelor’s degree or higher in EE, CE, or CS.
• 10+ years of semiconductor verification experience with SystemVerilog, UVM, assertions, and coverage.
• Experience with verification platforms: UVM test benches, FPGA, emulators, and system testing.
• Strong debugging and verification methodology skills.

Preferred:

• PhD in related fields.
• Experience with ARM, DSP ISA, CPU block testing, formal verification, post-silicon validation, and industry-standard buses like AXI4.
• Proficiency in C/C++, Python, Tcl, Perl, and understanding of SoC architecture and FPGA/emulation platforms.

Amazon values diversity and is an equal opportunity employer. For accommodations, visit this link.