ASIC Design Engineer: RTL Tools & DevOps (Hybrid)

NVIDIA Corporation; Austin (TX); Hybrid; USD 116,000 - 219,000; Full time

Job summary

NVIDIA is seeking an ASIC Design Engineer to advance hardware design and methodology across our GPU and AI compute platforms. You will develop in-house tools, own verification blocks, and contribute to DevOps for RTL generation in a collaborative, hybrid environment in Austin.

The role requires a degree in Electrical or Computer Engineering, 3+ years of experience, Verilog proficiency, and scripting in Python or Perl, with strong cross-team communication and Unix/Linux skills.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering (or equivalent experience).
• 3+ years of proven experience preferred.
• Solid understanding of fundamental digital design concepts with hands-on experience in Verilog.
• Proficiency in scripting using modern Python and/or Perl.
• Experience with Unix/Linux shell scripting and Makefiles.
• Strong ability to collaborate with multi-functional teams and effectively communicate technical details.

Responsibilities

• Develop and deploy in-house tools and workflows to support engineering business units across NVIDIA.
• Take ownership of tools that verify common design blocks used in all products at NVIDIA.
• Act as a DevOps engineer for automated RTL generation by developing new features and maintaining efficient operations for existing users.
• Build new workflows and methodologies to ensure smooth integration into various IP development environments.

Skills

Verilog

Python/Perl scripting

Unix/Linux shell scripting

Collaboration & communication

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Tools

Makefiles

Job description

NVIDIA is seeking an ASIC Design Engineer to advance hardware design and methodology across our GPU and AI compute platforms. You will develop in-house tools, own verification blocks, and contribute to DevOps for RTL generation in a collaborative, hybrid environment in Austin.

The role requires a degree in Electrical or Computer Engineering, 3+ years of experience, Verilog proficiency, and scripting in Python or Perl, with strong cross-team communication and Unix/Linux skills.