ASIC Design and Integration Engineer

Apple

Beaverton (OR)

On-site

USD 181,100 - 318,400

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Comprehensive medical and dental coverage
Retirement benefits
Discounted products and services
Tuition reimbursement for education
Employee stock purchase plan

Job summary

A leading technology company in Beaverton seeks an experienced ASIC Design Engineer to design, implement, and verify complex ASICs. The role involves collaboration with hardware and software teams, optimizing designs for power and performance, and detailed documentation. Preferred qualifications include over 8 years of experience in ASIC design, proficiency in SystemVerilog, and strong analytical skills. The position offers competitive salary ranges from $181,100 to $318,400, stock options, and comprehensive benefits.

Qualifications

  • 8+ years of proven experience in ASIC design, including RTL design and verification.
  • Hands-on experience with ASIC design tools and methodologies is essential.
  • Experience with high-speed I/O design and protocols.

Responsibilities

  • Design, implementation, and verification of complex ASICs.
  • Engage with verification teams to ensure design validation.
  • Conduct timing analysis and power optimization.

Skills

Experience with ASIC design
Proficiency in SystemVerilog
Strong analytical skills
Excellent communication skills
Attention to detail
Familiarity with PCIe

Tools

ASIC design tools
FPGA prototyping tools

Job description

Overview

Summary Apple’s Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic group. In this role, you will develop custom SoCs that drive the performance and efficiency of Apple’s products. You will work on cutting-edge technologies and collaborate with cross-functional teams to deliver groundbreaking solutions.

Description
  • Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL using SystemVerilog and perform synthesis.
  • Verification: Engage with simulation-based and formal verification teams to ensure robust design validation.
  • Integration and Testing: Collaborate with hardware and software teams to integrate digital designs into complex SoCs.
  • Timing and Power Analysis: Conduct timing analysis and power optimization to achieve PPA goals.
  • Documentation and Reporting: Create detailed micro-architecture and design documentation.
Preferred Qualifications
  • Experience: 8+ years of proven experience in ASIC design, including RTL design and verification. Hands-on experience with ASIC design tools and methodologies is essential.
  • Technical Skills: Proficiency in SystemVerilog, RTL design, synthesis, and timing analysis.
  • Problem-Solving: Strong analytical and problem-solving skills.
  • Collaboration: Excellent communication and teamwork skills, work effectively in cross-functional teams.
  • Attention to Detail: Meticulous attention to detail and a commitment to delivering high-quality designs.
  • Experience with high-speed I/O design and protocols. Knowledge of PCIe is a plus.
  • Familiarity with custom ASIC design and FPGA prototyping.
  • Hands on experience in all aspects of front-end chip development process (e.g., CDC/RDC, LINT, LEC, etc.).
  • Knowledge of low-power design techniques and power optimization strategies.
Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Apple accepts applications to this posting on an ongoing basis.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

ASIC Design and Integration Engineer
ASIC Design and Integration Engineer

Apple Inc. • Beaverton (OR)

On-site
USD 100,000 - 130,000
ASIC Design Engineer
ASIC Design Engineer

Apple Inc. • Beaverton (OR)

On-site
USD 150,000 - 210,000
ASIC Design Engineer
ASIC Design Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 180,000 - 280,000
ASIC Design and Integration Engineer - Silicon Security
ASIC Design and Integration Engineer - Silicon Security

Apple Inc. • Cupertino (CA)

On-site
USD 129,000 - 195,000
Medical and dental coverage
Retirement benefits
Employee stock programs
+1
ASIC Design and Integration Engineer – Silicon Security
ASIC Design and Integration Engineer – Silicon Security

Apple Inc. • Cupertino (CA), Northern (KY)

Hybrid
USD 185,000 - 325,000
ASIC Design Manager
ASIC Design Manager

Apple Inc. • Cupertino (CA), Northern (KY)

Hybrid
USD 206,000 - 356,000
Stock plans
Retirement benefits
Education reimbursement
+1
ASIC Design Engineer — IP Integration & Implementation
ASIC Design Engineer — IP Integration & Implementation

Apple Inc. • Sunnyvale (CA), Northern (KY)

Hybrid
USD 150,000 - 278,000
Medical and dental coverage
Employee stock plans
Tuition reimbursement
+1
ASIC Design Engineer
ASIC Design Engineer

Apple Inc. • Santa Clara (CA)

On-site
USD 129,000 - 195,000
Wireless SoC Design Engineer
Wireless SoC Design Engineer

Apple • San Diego (CA)

On-site
USD 171,000 - 303,000
Comprehensive medical coverage
Retirement benefits
Discounted products
Timing Design Engineer
Timing Design Engineer

Apple Inc. • San Diego (CA)

On-site
USD 122,700 - 214,300