Analog/Mixed Signal Verilog Modeling Design Engineer

Broadcom; Irvine (CA); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Discretionary annual bonus

Equity grants

401K with company match

Medical, dental, vision benefits

Paid holidays and vacation

Job summary

Broadcom Irvine seeks an experienced engineer to develop Digital-Mixed Signal (DMS) models for analog IPs using SystemVerilog. You will collaborate with analog design and DV teams to verify chip functionality and ensure robust mixed-signal behavior.

The role requires Verilog-AMS expertise, SV UDT/UDR proficiency, and hands-on scripting with TCL/Perl/Python. Experience with Cadence tools and AI-assisted modeling is a plus.

Qualifications

• Bachelor's degree in a relevant field.
• 8+ years of related experience in analog/mixed-signal modeling or verification.
• Strong knowledge of SystemVerilog and Verilog-AMS modeling is required.

Responsibilities

• Develop Digital-Mixed Signal (DMS) models of analog IPs (touch controller AFEs, wireless power charging, health sensing AFE, satellite AFEs) using SystemVerilog.
• Interface with analog design team and chip DV team to develop and support analog/mixed signal models for chip verification.
• Understand Verilog-AMS modeling language.
• Demonstrate proficiency with SystemVerilog UDT/UDR nettype (Cadence wreal or EEnet).
• Familiar with analog circuits (LDOs, TIAs, analog muxing, SARADC S/H, comparators, DAC, buffering).
• Write RTL for digital design and develop testbenches.
• Be fully familiar with SV vs schematic verification for SV models.
• Familiar with Cadence linting & simulation tools (ncsim, xrun, vcs) and analog schematic editor.
• Hands-on scripting in TCL/Perl/Python.
• Experience using AI tools (Cursor, chipAgents) to generate analog SV models and testbenches from design specs.
• Education: Bachelor's degree and 8+ years of related experience.

Skills

SystemVerilog

Verilog-AMS

DMS modeling

Cadence tools

TCL/Perl/Python

AI tools (Cursor, chipAgents)

RTL and testbenches

Analog IP knowledge

Education

Bachelor's degree

Tools

Cadence linting tools

ncsim

xrun

VCS

Analog schematic editor

Job description

USA-CA Irvine Alton Parkway Bldg 1

USA-CA San Jose Innovation Drive

Full time

Job Description

• Responsible for developing Digital-Mixed Signal (DMS) models of analog IPs such as touch controller AFEs, wireless power charging, health sensing AFE and satellite AFEs using SystemVerilog language.

• Interface with analog design team and chip DV team to develop and support analog/mixed signal models for chip verification.

• Understand Verilog-AMS modeling language

• Good knowledge of SystemVerilog UDT/UDR nettype (using Cadence wreal or EEnet package)

• Familiar with analog circuits such as LDOs, TIAs, analog muxing, SARADC sample-and-hold (S/H), comparators, DAC voltage converter, buffering and amplification, etc.

• Understand good coding of RTL of digital design (eg clock divider, decoder, FSM, etc) and testbench creation.

• Fully familiar with how to run SV .vs. schematic verification for a given leaf SV model.

• Familiar with Cadence linting & simulation tools (ncsim, xrun, vcs) and analog schematic editor.

• Hands-on skills in scripting languages (TCL/Perl/Python)

• Experience with using AI tools such as Cursor, chipAgents to generate analog SV models and testbench based on a given design spec.

• Experience : Bachelor's and 8+ years of related experience

Compensation and Benefits

The annual base salary range for this position is To

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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