Digital Signal Processing and System Validation Engineer

Broadcom Inc.; Wayne (CA); On-site; USD 170,000 - 250,000; Full time

Benefits offered by this job

Medical, dental and vision plans

401(k) with company matching

Employee stock purchase program

Job summary

Broadcom Inc. is seeking a Digital Signal Processing and System Validation Engineer to design DSP blocks for next‑gen optical data center connectivity products.

You will validate ASIC architecture pre- and post‑silicon, translating CDR and equalization into Verilog for synthesis and using MATLAB/Simulink for modeling. The role requires deep expertise in high‑speed PAM4/NRZ signaling, front‑end tools, and DFT‑friendly RTL.

Qualifications

• MS in Electrical Engineering or Computer Engineering with 10+ years or PhD with 7+ years in DSP design for SerDes and data center networking.
• Experience in post-silicon validation of digital and analog mixed-signal IPs.
• Understanding of 100G/200G/400G PAM4 and NRZ per-lane design trade-offs.
• Ability to translate CDR and equalization architectures into Verilog for synthesis.
• Proficiency with MATLAB, Simulink and Verilog‑HDL/SystemVerilog.
• Experience with front end tools such as NCVerilog, NCSIM, Simvision, Spyglass.
• Exposure to Design for Test (DFT) RTL and scan concepts.
• Experience in synthesis, CDC, static timing analysis and SDF annotated simulations.

Responsibilities

• Design digital signal processing blocks for next‑gen optical data center connectivity products.
• Validate ASIC architecture pre‑ and post‑silicon.
• Translate DSP architectures into synthesizable Verilog for logic synthesis.
• Collaborate with cross‑functional teams to optimize performance, power and cost.

Skills

DSP design

SerDes

Data center networking

High-speed signaling

Education

MS in Electrical/Computer Engineering

PhD

Tools

MATLAB

Simulink

Verilog-HDL/SystemVerilog

NCVerilog

NCSIM

Simvision

Spyglass

Job description

Job Description

Broadcom is looking for a Digital Signal Processing and System Validation Engineer. In this highly visible role, you will be designing digital signal processing blocks for the next generation of optical data center connectivity products. You will be responsible for validating the ASIC architecture post and pre-silicon.

Qualifications

• MS in Electrical Engineering or Computer Engineering with 10+ years or PhD with 7+ years of experience in digital signal processing design for SerDes and serial link high-speed data center networking.
• Experience in post silicon validation of digital and analog mixed-signal IPs.
• Deep understanding of ADC and analog based optical and electrical interconnect architectures such as 100G/200G/400G per lane PAM4 and NRZ design trade-offs to drive attainment on metrics such as performance, power, and cost over the project lifetime.
• Experience translating CDR and equalization architectures into Verilog code for logic synthesis.
• Proficient with Matlab, Simulink and Verilog-HDL/System Verilog coding.
• Experience with front end tools such as NCVerilog, NCSIM, Simvision, Spyglass.
• Exposure to Design for test, understanding of scan concept and writing DFT friendly RTL.
• Experience in synthesis, CDC, static timing analysis.
• Exposure to SDF annotated simulations with good understanding of parasitic delays.

Highly Desired Qualifications

• Good understanding of high speed DSP applications and algorithms.
• Prior experience of high speed ADC, FFE, DFE, CDR Adaptation algorithms for PAM4 signals.
• Understanding of logic optimization for low power, timing margins & DFT.
• Deep understanding of Signal Integrity and Power Integrity modeling for High Speed designs.
• Understanding & exposure to Verilog AMS simulation, experience in behavioral models of analog circuits will be helpful.
• Willing to work in a multifunctional role.
• Strong written and verbal communication skills, with the specific ability to speak to various technical and management levels.
• Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results.
• Excellent time and task management, and interpersonal skills.

Compensation and Benefits

The annual base salary range for this position is To

• Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
• The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence. Welcome! Thank you for your interest in Broadcom! We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions. For more information please visit our video library and check out our Connected by Broadcom series. Follow us on Linked In Broadcom Inc.