AMS Verification Engineer (RFIC) for Space Tech

InvestedintheMission; Redmond (WA); On-site; USD 125,000 - 200,000; Full time

Benefits offered by this job

Stock options

Bonuses

Medical, vision and dental coverage

401(k) retirement plan

Disability insurance

Paid parental leave

3 weeks paid vacation

10+ paid holidays per year

Shuttle to SpaceX Redmond office

Job summary

SpaceX is seeking an AMS Verification Engineer (Silicon Engineering) to develop and own full‑chip analog/digital verification flows for RFICs and RF‑SoCs used in Starlink. You’ll create testbenches, improve simulation accuracy with designers, and collaborate with systems, firmware, and ASIC teams across global space and ground infrastructure.

We value experience with AMS tools, SystemVerilog/UVM, Python, and Verilog‑A/AMS modeling.

Qualifications

• Bachelor’s degree in an engineering discipline.
• 1+ years of IC design/verification experience.
• Master’s degree or PhD in engineering with emphasis in IC design/verification (preferred).
• Experience with AMS simulation tools and flows.
• Experience with annotated gate-level simulation within an AMS simulator.
• SystemVerilog, UVM, Python experience.
• Behavioral models for analog/mixed‑mode IPs in Verilog‑A/AMS.
• Understanding of analog circuit fundamentals and RF/analog IPs.
• Understanding of RTL and gate‑level netlists.
• Ability to work long hours and weekends as necessary.

Responsibilities

• Develop and own analog-on-top and digital-on-top verification flows for full-chip simulations of in-house RFICs and RF-SoCs.
• Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs.
• Work with designers to improve speed/accuracy of simulations for mixed-signal IPs (PLLs, DACs, ADCs).
• Create behavioral models of RF/analog/mixed-mode blocks and use them in chip verification.
• Coordinate with ATE test engineering to develop test plans.
• Set up and run EM/IR simulations.

Skills

AMS verification

Analog/mixed-signal understanding

RTL and gate-level netlists

Cross-disciplinary collaboration

Education

Bachelor’s degree in engineering

Master’s degree or PhD in engineering

Tools

SystemVerilog

UVM

Python

AMS simulation tools

Verilog‑A/AMS

Job description

SpaceX is seeking an AMS Verification Engineer (Silicon Engineering) to develop and own full‑chip analog/digital verification flows for RFICs and RF‑SoCs used in Starlink. You’ll create testbenches, improve simulation accuracy with designers, and collaborate with systems, firmware, and ASIC teams across global space and ground infrastructure.

We value experience with AMS tools, SystemVerilog/UVM, Python, and Verilog‑A/AMS modeling.