AI-Optimized Memory Architect & Microarchitecture Engineer

Micron Memory Malaysia Sdn Bhd; Folsom (CA); On-site; USD 177,000 - 309,000; Full time

Job summary

Micron Technology in Folsom, CA is seeking a Member of Technical Staff to shape AI-optimized memory architectures and implement high-performance memory systems. You will own digital design blocks from architecture to silicon, focusing on performance, power, and reliability for AI workloads.

The role requires deep experience in memory systems and SoC hardware design, proficiency in SystemVerilog and synthesis, and strong collaboration across teams. A Masters/PhD or equivalent is preferred.

Qualifications

• 5+ years of silicon memory systems and SoC hardware design experience.
• Strong digital design and microarchitecture ownership from specification to implementation.
• Experience with SystemVerilog, synthesis and PPA estimation.

Responsibilities

• Translate architecture requirements into scalable microarchitectures with ownership from concept through implementation.
• Design, implement, and review SystemVerilog memory system designs.
• Perform synthesis and early PPA estimation to optimize area, power, timing.

Skills

SystemVerilog

C/C++

Python

Digital design

Microarchitecture

Education

Masters or PhD in CS/CE/EE

Job description

Micron Technology in Folsom, CA is seeking a Member of Technical Staff to shape AI-optimized memory architectures and implement high-performance memory systems. You will own digital design blocks from architecture to silicon, focusing on performance, power, and reliability for AI workloads.

The role requires deep experience in memory systems and SoC hardware design, proficiency in SystemVerilog and synthesis, and strong collaboration across teams. A Masters/PhD or equivalent is preferred.