AI-Enhanced ASIC Design Quality & IP Integration Engineer

Lever, Inc.

San Francisco (CA)

On-site

USD 150,000 - 230,000

Full time

14 days+
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Benefits offered by this job

Equity participation
Comprehensive benefits

Job summary

Eliyan seeks an engineer to own signoff criteria for lint, CDC, and synthesis across active programs, and to build AI-augmented tooling turning violations into designer-ready reviews. You’ll work alongside RTL designers and report into the digital design team.

This role centers on design quality, automation, and IP integration, with on-site work in the Bay Area, Vancouver, or Toronto. Full-time with equity and comprehensive benefits are offered.

Qualifications

  • 5+ years in ASIC or SoC design or design automation.
  • Experience running and analyzing lint/CDC/synthesis tools.
  • Ability to read violations, assess severity, and disposition findings.
  • Experience building CI/CD pipelines (Jenkins, GitLab CI, or GitHub Actions).
  • Authorization to work in the United States or Canada; on-site in Bay Area/Vancouver/Toronto.

Responsibilities

  • Define and maintain lint, CDC, and synthesis signoff criteria.
  • Build and own waiver management system with audit trail.
  • Analyze synthesis results for area, timing, and power regressions.
  • Develop AI-augmented tooling for violation triage and designer reviews.
  • Automate IP release packaging and delivery, with reproducible builds.

Skills

ASIC/SoC design
Lint/CDC/RDC
SystemVerilog
Python
Tcl
Shell scripting
Git
Linux
CI/CD pipelines
VC SpyGlass

Education

Bachelor's degree in Electrical Engineering
Master's degree in Electrical Engineering
PhD in related field

Tools

Genus
Fusion Compiler
Ques taLint
VC SpyGlass
IP-XACT
PeakRDL

Job description

Eliyan seeks an engineer to own signoff criteria for lint, CDC, and synthesis across active programs, and to build AI-augmented tooling turning violations into designer-ready reviews. You’ll work alongside RTL designers and report into the digital design team.

This role centers on design quality, automation, and IP integration, with on-site work in the Bay Area, Vancouver, or Toronto. Full-time with equity and comprehensive benefits are offered.

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