AI-Driven RTL-to-GDS Flow Architect

NXP Semiconductors; Austin (TX); Hybrid; USD 180,000 - 320,000; Full time

Job summary

NXP Semiconductors seeks a Digital Design Flow Architect to define and deploy a repeatable end-to-end RTL-to-GDS design flow for advanced process technologies. You will lead AI-enabled debugging, design-space exploration, and automated analysis loops, coordinating with CAD/methodology, foundry, and EDA vendors to improve PPA and productivity.

Required are a strong background in digital implementation, static verification, and flow automation, with leadership experience shaping technical

Qualifications

• Education: B.S. in Electrical Engineering, Computer Engineering, Computer Science, or related field required; M.S. or Ph.D. preferred.
• Level: Director of Technology-level technical leader of digital design, CAD/methodology, EDA implementation, or flow architecture experience.
• Scope: Ability to set technical direction, influence senior stakeholders, and lead cross-functional flow transformation across domains.

Responsibilities

• Architect a modular RTL-to-GDS flow supporting synthesis, place and route, timing/power closure, static verification, signoff, and GDS delivery.
• Enable agentic execution, AI-assisted debugging, design-space exploration, and automated analysis loops for EDA workflows.
• Establish repeatable and traceable flow practices, including standard recipes, configuration baselines, metrics, dashboards, audit trails, regression checks, and release management.
• Deploy flows for new process technologies in partnership with design, CAD/methodology, foundry, and EDA vendor teams.
• Improve productivity, turnaround time, quality-of-results, and PPA through automation, methodology tuning, and scalable reuse.

Skills

RTL-to-GDS

Static timing analysis

Formal/static verification

PPA optimization

Agentic AI workflow

Scripting (Tcl, Python, Perl)

Automation and tooling

Flow architecture

Cross-functional leadership

Education

B.S. in Electrical Engineering, Computer Engineering, or Computer Science

M.S. or Ph.D. preferred

Tools

Synopsys

Cadence

Siemens EDA

Job description

NXP Semiconductors seeks a Digital Design Flow Architect to define and deploy a repeatable end-to-end RTL-to-GDS design flow for advanced process technologies. You will lead AI-enabled debugging, design-space exploration, and automated analysis loops, coordinating with CAD/methodology, foundry, and EDA vendors to improve PPA and productivity.

Required are a strong background in digital implementation, static verification, and flow automation, with leadership experience shaping technical