AI-Driven Formal Verification Engineer

ChipAgents; San Jose (CA); On-site; USD 150,000 - 350,000; Full time

Benefits offered by this job

Unlimited PTO

Full benefits (medical, vision, dental, 401k)

Free lunch, drinks, and snacks

Job summary

ChipAgents is seeking a Formal Verification Engineer to work with AI engineering and EDA teams. The role focuses on formal methods and assertion-based verification in semiconductor design. Candidates should have strong expertise in formal verification methodologies and experience with tools like JasperGold and SystemVerilog Assertions.

This position offers a competitive salary ranging from $150K to $350K per year, plus equity and full benefits including unlimited PTO. Join us to shape the future of semiconductor design.

Qualifications

• Strong expertise in formal verification methodologies and signoff flows.
• Deep knowledge of SystemVerilog Assertions and assertion-based verification.
• Proficiency in Python or scripting for verification automation.

Responsibilities

• Collaborate on formal verification workflows.
• Develop and debug SystemVerilog Assertions and properties.
• Use verification tools to analyze RTL designs and prove correctness.
• Create formal verification examples to train AI agents.
• Support evaluation of AI-assisted verification productivity.

Skills

Formal verification methodologies

Experience with JasperGold

SystemVerilog Assertions

Debugging counterexamples

Python scripting

Tools

JasperGold

VC Formal

Questa Formal

Job description

ChipAgents is seeking a Formal Verification Engineer to work with AI engineering and EDA teams. The role focuses on formal methods and assertion-based verification in semiconductor design. Candidates should have strong expertise in formal verification methodologies and experience with tools like JasperGold and SystemVerilog Assertions.

This position offers a competitive salary ranging from $150K to $350K per year, plus equity and full benefits including unlimited PTO. Join us to shape the future of semiconductor design.