3DIC/CPU CAD Engineer - Multi-Die Flows & Power Integrity

Qualcomm

Santa Clara (CA)

On-site

USD 176,000 - 263,000

Full time

14 days+
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Benefits offered by this job

Annual bonus program
RSU grants
Competitive benefits package

Job summary

Qualcomm Technologies, Inc. in Santa Clara is seeking a senior hardware/CPU engineering specialist to help reimagine silicon and deliver high-performance, energy-efficient computing platforms.

You will collaborate with global teams, develop and maintain advanced CPU flows, and work with EDA tools to optimize power, timing, and area.

The role requires 8+ years in hardware or software related to CPUs, and experience with Innovus, Primetime, Star-RC, and Python/Tcl.

Qualifications

  • Bachelor's degree or higher in a relevant field with 4+ years of hardware or software experience.
  • PhD or master's with relevant work experience also acceptable per minimum qualifications.
  • Experience with CPU flow development and EDA tools is preferred.

Responsibilities

  • Collaborate with global design and CAD teams.
  • Enablement of 3DIC/multi-die in existing or new flows (TSV during floor planning).
  • Support static timing, extraction, and power integrity across multiple dies.
  • Architect, maintain, and support CPU flows and resolve project issues.
  • Coordinate with EDA vendors to define roadmaps and resolve tool issues.

Skills

Python
Tcl
Data structures
Programming

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

Innovus
Primetime
Star-RC

Job description

Qualcomm Technologies, Inc. in Santa Clara is seeking a senior hardware/CPU engineering specialist to help reimagine silicon and deliver high-performance, energy-efficient computing platforms.

You will collaborate with global teams, develop and maintain advanced CPU flows, and work with EDA tools to optimize power, timing, and area.

The role requires 8+ years in hardware or software related to CPUs, and experience with Innovus, Primetime, Star-RC, and Python/Tcl.

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