CPU Design Engineer – High-Performance & Low-Power

QUALCOMM, Inc.; Santa Clara (CA); On-site; USD 148,000 - 222,000; Full time

Job summary

Qualcomm Technologies, Inc. in Santa Clara, CA is seeking a CPU Engineer to lead high-performance CPU design efforts, verify multi-core CPU operations, and collaborate with cross-functional teams across the company.

The role focuses on architecture, verification, and implementation, with responsibilities spanning pre- and post-silicon activities, documentation, and collaboration with hardware and software groups to meet performance and power targets.

Qualifications

• Bachelor's degree with 2+ years in hardware/software/related field.
• Master's degree with 1+ year experience.
• PhD in Electrical/Computer Engineering or related field.

Responsibilities

• Applies knowledge of computer architecture, micro-architecture, logic design, circuits, and/or physical design to develop and verify high performance and low power CPU designs.
• Anticipates, identifies, and solves problems to ensure design completeness, functionality, power, and performance.
• Collaborates across teams to define requirements, specifications, and trade-offs to accomplish product goals.
• Evaluates the design process from conceptualization to productization that meet customer and industry standards.
• Writes detailed technical documentation for CPU designs.

Skills

Hardware Engineering

Software Engineering

Electrical Engineering

Systems Engineering

C/C++ programming

Education

Bachelor's degree in EE/CE/CS

Master's degree in EE/CE/CS

PhD in EE/CE/CS

Tools

Verilog

VHDL

Synthesis tools

Simulation tools

Job description

Qualcomm Technologies, Inc. in Santa Clara, CA is seeking a CPU Engineer to lead high-performance CPU design efforts, verify multi-core CPU operations, and collaborate with cross-functional teams across the company.

The role focuses on architecture, verification, and implementation, with responsibilities spanning pre- and post-silicon activities, documentation, and collaboration with hardware and software groups to meet performance and power targets.