Turn this role into an interview — a resume and cover letter built around what this employer wants.
MICRON SEMICONDUCTOR ASIA OPERATIONS PTE LTD is seeking an Advanced Packaging Integration Engineer to lead deployment of advanced packaging technologies and drive yield, quality, and manufacturability improvements. You will collaborate with global teams to transition from development to high-volume production and integrate AI-enabled insights into daily workflows.
Ideal candidates hold a PhD or equivalent with several years in semiconductor packaging, and are proficient in Python, R, SQL, and
Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.
We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing.
We are looking for an Advanced Packaging Integration Engineer to join our Advanced Packaging Technology Development (APTD) team!
Your responsibilities include but are not limited to developing and enabling deployment of advanced packaging technologies to meet performance, cost, manufacturability, quality, reliability and schedule requirements. You will also be required to identify, diagnose, and propose yield related breakthroughs. You will have opportunity to work with peers and partners across organizations to coordinate the development and launch of new technologies and integration flows for solutions that drive the future.
Develop and enable advanced package technology for various post-fab wafer finish and assembly processes
Focus on improving product quality, driving yield improvements, reducing costs, and enhancing productivity
Integrate semiconductors while partnering with process and product engineering teams
Achieve and improve yields through silicon package integration innovation, not limited to layout/design or process margin improvements.
Collect and analyze data to provide actionable outcomes and decisions for layout, design, or integration flow changes.
Work with Probe, Yield Analysis, Test, and Product Engineering teams to drive improvements
Ensure defense coverage through process, measurement, inspection, and testing
Establish correlations between defense mechanisms to identify improvement opportunities
Conduct continuous data analysis to establish advanced controls and identify improvement opportunities
Work closely with internal and external stakeholders to build and execute technology development strategies aligned with organizational and business objectives
Work closely with various teams, including the PWF Engineering, Assembly Engineering, Front End Wafer Fab, Assembly/Test Engineering, Product Engineering, and Global Quality, to integrate manufacturing processes for optimal performance and quality control
Ensure smooth transition from new product development, qualification, small volume production to high volume production
Provide Process Of Record (POR) and Model Of Record (MOR) documentation for product transfer to production High Volume Manufacturing Fabrication facilities
Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.
Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work.
PhD with ≥2 years Master’s degree with ≥5 years, or Bachelor’s degree with ≥7 years of relevant experience in Electrical Engineering, Materials Science, Chemical Engineering, Physics, or a related field.
Semiconductor process integration experience, preferably with know-how to develop and enable advanced package technology for post-fab wafer finish and assembly processes.
Proficiency in Python, R, SQL for statistical analysis, process modeling, and data analytics.
Experience with Visual Basic for automation and tool integration.
Familiarity with E3, FDC (Fault Detection and Classification), and RMS (Recipe Management System) for equipment and process control.