Staff Engineer (IC Design)

JDA WMS PTE. LTD.; Singapore; Vor Ort; SGD 120.000 - 180.000; Vollzeit

Zusammenfassung

JDA WMS PTE. LTD. in Singapore is seeking an experienced Senior Digital IC Design Engineer to advance our front-end/back-end flows and deliver robust ASIC solutions.

You will create optimized gate-level netlists, develop and validate SDC constraints, support DFT/UPF, perform STA and ECO validation, and assist with floorplanning in a fast-paced environment.

Qualifikationen

• Bachelor’s or Master’s degree in Electrical/Electronic Engineering
• 5+ years of experience in digital IC design
• Proficient with EDA tools such as Synopsys and Cadence
• Experience with GPUs or microcontrollers is a plus

Aufgaben

• Create optimized gate-level netlists
• Develop and validate SDC constraints
• Support DFT and power intent (UPF)
• Perform formal equivalence checks and STA
• Assist with floorplanning and clock tree design
• Implement and validate ECOs
• Improve IC design flows and methodologies
• Take on tasks to support smooth business operations
• Adapt to changes as the business evolves

Kenntnisse

Digital IC design

Ausbildung

Bachelor’s or Master’s degree in Electrical/Electronic Engineering

Tools

Synopsys

Cadence

Jobbeschreibung

Key Responsibilities:

• Perform middle-end IC design tasks:
  • Create optimized gate-level netlists
  • Develop and validate SDC constraints
  • Support DFT and power intent (UPF)
  • Perform formal equivalence checks and Static Timing Analysis (STA)
  • Assist with floorplanning and clock tree design
  • Implement and validate ECOs
• Improve IC design flows and methodologies.
• Take on tasks as assigned to support smooth business operations.
• Adapt to changes as the business evolves.

Requirements:

• Bachelor’s or Master’s degree in Electrical/Electronic Engineering
• 5+ years of experience in digital IC design
• Skilled with EDA tools (e.g. Synopsys, Cadence)
• Experience with graphics processors or microcontrollers is a plus