SoC Verification Lead: Zero-Defect & Methodologies

Ambition Singapore; Singapore; On-site; SGD 180,000 - 240,000; Full time

Job summary

Ambition Singapore is seeking a Principal Consultant, Engineering & Manufacturing to lead a high-performing design verification team responsible for delivering robust, zero-defect SoC and ASIC solutions.

The role focuses on advancing verification methodologies across increasing design complexity while ensuring high-quality, on-time execution through strong technical leadership and structured verification planning.

Qualifications

• MSEE/BSEE in Electrical or Computer Engineering with 10+ years of relevant experience.
• Strong expertise in SoC architecture, IP integration, and system-level verification.
• Deep knowledge of UVM verification methodology.
• Hands-on experience with ASIC verification flows and EDA tools.
• Proficiency in C and/or scripting languages such as Python or Perl.
• Proven team leadership and strong communication skills.

Responsibilities

• Lead and manage a verification team developing advanced methodologies across UVM, C/C++ co-simulation, system emulation, mixed-mode simulation, and formal verification.
• Define, review, and execute comprehensive test plans with full coverage and high-quality standards.
• Drive systematic verification strategies to achieve zero-defect silicon.
• Oversee verification flow development aligned with ASIC and SoC design methodologies.
• Ensure effective IP integration and system-level verification.
• Promote disciplined execution, continuous improvement, and technical excellence within the team.

Skills

SoC architecture

IP integration

System-level verification

UVM verification

ASIC verification

Python

C

Leadership

Communication

RTL design

Education

MSEE/BSEE in Electrical or Computer Engineering

Tools

EDA tools

RTL design

Job description

Ambition Singapore is seeking a Principal Consultant, Engineering & Manufacturing to lead a high-performing design verification team responsible for delivering robust, zero-defect SoC and ASIC solutions.

The role focuses on advancing verification methodologies across increasing design complexity while ensuring high-quality, on-time execution through strong technical leadership and structured verification planning.