SoC Design Verification Manager

Ambition Group Singapore Pte. Ltd. (SG); Singapore; On-site; SGD 180,000 - 240,000; Full time

Job summary

Ambition Group Singapore Pte. Ltd. (SG) seeks a senior design verification leader to drive a high-performing team delivering robust, zero-defect SoC and ASIC solutions.

The role emphasizes advancing verification methodologies and executing structured planning to handle increasing design complexity. You will lead a team skilled in UVM, C/C++ co-simulation, system emulation, mixed-mode simulation and formal verification, define comprehensive test plans, and ensure tight IP integration and

Qualifications

• MSEE/BSEE in Electrical or Computer Engineering with 10+ years of relevant experience.
• Strong expertise in SoC architecture and IP integration.
• Deep knowledge of UVM verification methodology.
• Hands-on experience with ASIC verification flows and EDA tools.
• Proficiency in C and/or scripting languages such as Python or Perl.
• Proven leadership and strong communication skills.
• Experience in RTL design is an advantage.
• Background in video processing or video analytics is a plus.
• Strong general programming capability.

Responsibilities

• Lead and manage a verification team developing advanced methodologies across UVM, C/C++ co-simulation, system emulation, mixed-mode simulation, and formal verification.
• Define, review, and execute comprehensive test plans with full coverage and high-quality standards.
• Drive systematic verification strategies to achieve zero-defect silicon.
• Oversee verification flow development aligned with ASIC and SoC design methodologies.
• Ensure effective IP integration and system-level verification.
• Promote disciplined execution, continuous improvement, and technical excellence within the team.

Skills

UVM verification

C/C++ co-simulation

System emulation

Mixed-mode simulation

Formal verification

Test planning

Team leadership

IP integration

RTL design awareness

Video processing exposure

Education

MSEE/BSEE in Electrical or Computer Engineering

Tools

EDA tools

Job description

Role Overview

This role leads and drives a high-performing design verification team responsible for delivering robust, zero-defect SoC and ASIC solutions. The position focuses on advancing verification methodologies across increasing design complexity while ensuring high-quality, on-time execution through strong technical leadership and structured verification planning.

Key Responsibilities

• Lead and manage a verification team developing advanced methodologies across UVM, C/C++ co-simulation, system emulation, mixed-mode simulation, and formal verification.
• Define, review, and execute comprehensive test plans with full coverage and high-quality standards.
• Drive systematic verification strategies to achieve zero-defect silicon.
• Oversee verification flow development aligned with ASIC and SoC design methodologies.
• Ensure effective IP integration and system-level verification.
• Promote disciplined execution, continuous improvement, and technical excellence within the team.

Ideal Requirements

• MSEE/BSEE in Electrical or Computer Engineering with 10+ years of relevant experience.
• Strong expertise in SoC architecture, IP integration, and system-level verification.
• Deep knowledge of UVM verification methodology.
• Hands-on experience with ASIC verification flows and EDA tools.
• Proficiency in C and/or scripting languages such as Python or Perl.
• Proven team leadership and strong communication skills.
• Experience in RTL design is an advantage.
• Background in video processing or video analytics is a plus.
• Strong general programming capability is highly valued.

Data provided is for recruitment purposes only. Only shortlisted candidates will be notified.

Business Registration Number : 200611680D | Licence Number : 10C5117 | EA Registration Number: R25127614