Senior Silicon Design Engineer: AI-Driven PnR & Timing

XILINX ASIA PACIFIC PTE. LTD.; Singapore; Sur place; SGD 90 000 - 170 000; Plein temps

Résumé du poste

Xilinx Asia Pacific Pte. Ltd. in Singapore seeks a hands-on physical design engineer to drive RTL/netlist-to-GDS flows across floorplanning, placement, routing and timing closure, using AI-assisted workflows and modern EDA tools to accelerate delivery and improve quality.

You will collaborate with RTL, circuit, integration and CAD teams, own or contribute to block- or subsystem-level design, and create reusable automation in Tcl, Python or shell while validating all AI outputs.

Qualifications

• Hands-on experience in PnR flows and timing closure.
• Experience with AI-assisted design workflows.
• Strong scripting for automation.
• Ability to analyze design data and validate AI outputs.

Responsabilités

• Own or contribute to RTL/netlist-to-GDS implementation: floor planning, power planning, placement, CTS, routing, optimization, ECOs and closure.
• Drive timing closure through STA, constraints (SDC) debugging, interface timing analysis and ECO development.
• Support hierarchical physical design and integration at block, subsystem and top level.
• Resolve challenges in timing, congestion, clocking, power, area, signal integrity and physical verification.
• Support signoff: STA, DRC/LVS, antenna, low-power checks and EM/IR.

Connaissances

Automation

Scripting (Python/Tcl)

Data-driven analysis

Complex design problem solving

Outils

Fusion Compiler

Innovus

PrimeTime

Calibre

StarRC

Description du poste

Xilinx Asia Pacific Pte. Ltd. in Singapore seeks a hands-on physical design engineer to drive RTL/netlist-to-GDS flows across floorplanning, placement, routing and timing closure, using AI-assisted workflows and modern EDA tools to accelerate delivery and improve quality.

You will collaborate with RTL, circuit, integration and CAD teams, own or contribute to block- or subsystem-level design, and create reusable automation in Tcl, Python or shell while validating all AI outputs.