Silicon Design Engineer - AI-Driven PnR/STA

AMD; Singapore; On-site; SGD 150,000 - 200,000; Full time

Job summary

AMD in Singapore is hiring for a Senior Physical Design/RTL integration role. You will own or contribute to RTL/netlist-to-GDS processes, drive timing closure, and support hierarchical design and signoff using AI-assisted workflows and modern EDA tools.

Collaboration across RTL, circuit, integration, CAD and global teams is essential. You will work with PnR, STA, physical design integration, and ECO development, applying strong engineering judgment and automation to accelerate delivery and

Qualifications

• Hands-on experience in PnR, STA and timing closure, SDC development, physical design integration, physical verification and signoff.
• Experience with Synopsys and/or Cadence tools such as Fusion Compiler, Innovus, PrimeTime, Tempus, StarRC and Calibre.
• Experience debugging complex design or flow problems.
• Advanced nodes and hierarchical designs are advantageous.
• Experience building reusable flows or methodologies is highly desirable.

Responsibilities

• Own or contribute to RTL/netlist-to-GDS implementation: floorplanning, power planning, placement, CTS, routing, optimization, ECOs and closure.
• Drive timing closure through STA, constraints (SDC) debugging, interface timing analysis and ECO development.
• Support hierarchical physical design and integration at block, subsystem and top level.
• Resolve challenges in timing, congestion, clocking, power, area, signal integrity and physical verification.
• Support signoff: STA, DRC/LVS, antenna, low-power checks and EM/IR.
• Build reusable automation in Tcl, Python, Perl or shell.
• Use AI coding assistants and agentic tools to speed up run analysis, debug, scripting and workflow automation, and share what works across the team.
• Collaborate with RTL, circuit, integration, CAD and global engineering teams.

Skills

PnR

STA

Timing Closure

SDC

Physical Design

Automation

Python

Tcl

AI-assisted tools

Team Collaboration

Tools

Fusion Compiler

Innovus

PrimeTime

Tempus

StarRC

Calibre

Job description

AMD in Singapore is hiring for a Senior Physical Design/RTL integration role. You will own or contribute to RTL/netlist-to-GDS processes, drive timing closure, and support hierarchical design and signoff using AI-assisted workflows and modern EDA tools.

Collaboration across RTL, circuit, integration, CAD and global teams is essential. You will work with PnR, STA, physical design integration, and ECO development, applying strong engineering judgment and automation to accelerate delivery and